[PowerPC] Rename some more VK_PPC_ enums

This renames more VK_PPC_ enums, to make them more closely reflect
the @modifier string they represent.  This also prepares for adding
a bunch of new VK_PPC_ enums in upcoming patches.

For consistency, some MO_ flags related to VK_PPC_ enums are
likewise renamed.

No change in behaviour.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184547 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Support @h modifier

This adds necessary infrastructure to support the @h modifier.
Note that all required relocation types were already present
(and unused).

This patch provides support for using @h in the assembler;
it would also be possible to now use this feature in code
generated by the compiler, but this is not done yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184548 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Support @toc@h modifier

This adds the relocation type and other necessary infrastructure
to use the @toc@h modifier in the assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184549 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Support @higher et.al. modifiers

This adds support for the @higher, @highera, @highest, and @highesta
modifers, including some missing relocation types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184550 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Support various tls-related modifiers

The current code base only supports the minimum set of tls-related
relocations and @modifiers that are necessary to support compiler-
generated code.  This patch extends this to the full set defined
in the ABI (and supported by the GNU assembler) for the benefit
of the assembler parser.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184551 91177308-0d34-0410-b5e6-96231b3b80d8

[PowerPC] Support R_PPC_REL16 family of relocations

The GNU assembler supports (as extension to the ABI) use of PC-relative
relocations in half16 fields, which allows writing code like:

  li 1, base-.

This patch adds support for those relocation types in the assembler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184552 91177308-0d34-0410-b5e6-96231b3b80d8
MI-Sched: Adjust regpressure limits for reserved regs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184564 91177308-0d34-0410-b5e6-96231b3b80d8
MI-Sched: cleanup DEBUG output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184565 91177308-0d34-0410-b5e6-96231b3b80d8
Fix IMULX machine model. Multiple def operands require multiple SchedWrites.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184566 91177308-0d34-0410-b5e6-96231b3b80d8
Make rematerialization in the coalescer less sensitive to LRG order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184567 91177308-0d34-0410-b5e6-96231b3b80d8
Modify the -join-globalcopies option (off by default).

Always coalesce in forward order to propagate rematerialization.
I'm fixing this option so I can enable it by default soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184568 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a -join-globalcopies bug; handle undef operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184569 91177308-0d34-0410-b5e6-96231b3b80d8
whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184570 91177308-0d34-0410-b5e6-96231b3b80d8
Refactor LiveRangeEdit::eliminateDeadDefs.

I want to add logic to handle more cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184571 91177308-0d34-0410-b5e6-96231b3b80d8
Handle more cases in LiveRangeEdit::eliminateDeadDefs.

Live intervals for dead physregs may be created during coalescing. We
need to update these in the event that their instruction goes away.

crash.ll is the unit test that catches it when MI sched is enabled on
X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184572 91177308-0d34-0410-b5e6-96231b3b80d8
Added -precompute-phys-liveness for testing LiveIntervals updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184573 91177308-0d34-0410-b5e6-96231b3b80d8
Update physreg live intervals during remat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184574 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR16360

When (srl (anyextend x), c) is folded into (anyextend (srl x, c)), the
high bits are not cleared. Add 'and' to clear off them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184575 91177308-0d34-0410-b5e6-96231b3b80d8
Add missing REQUIRES: asserts in crash.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184576 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Add support for selecting CUDA vs OCL mode based on triple

IR for CUDA should use "nvptx[64]-nvidia-cuda", and IR for NV OpenCL should use "nvptx[64]-nvidia-nvcl"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184579 91177308-0d34-0410-b5e6-96231b3b80d8