Add new directive called CHECK-LABEL to FileCheck.

CHECK-LABEL is meant to be used in place on CHECK on lines containing identifiers or other unique labels (they need not actually be labels in the source or output language, though.) This is used to break up the input stream into separate blocks delineated by CHECK-LABEL lines, each of which is checked independently. This greatly improves the accuracy of errors and fix-it hints in many cases, and allows for FileCheck to recover from errors in one block by continuing to subsequent blocks.

Some tests will be converted to use this new directive in forthcoming patches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186162 91177308-0d34-0410-b5e6-96231b3b80d8
Start using CHECK-LABEL in some tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186163 91177308-0d34-0410-b5e6-96231b3b80d8
X86: fold SSE2/AVX2 logical shift by immediate amount into zero vector when possible

Patch by Andrea Di Biagio


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186165 91177308-0d34-0410-b5e6-96231b3b80d8
Add static.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186170 91177308-0d34-0410-b5e6-96231b3b80d8
X86: Shrink certain forms of movsx.

In particular:
movsbw %al, %ax   --> cbtw
movswl %ax, %eax  --> cwtl
movslq %eax, %rax --> cltq

According to Intel's manual those have the same performance characteristics but
come with a smaller encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186174 91177308-0d34-0410-b5e6-96231b3b80d8
Fixed comment in header of Block Frequency Impl and added text for C++ mode.

This is a generic block implementation that works on more than machine blocks.
The C++ mode addition is a bonus due to the extra space provided.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186175 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Add ISA documents to the CompilerWriterInfo page

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186176 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add initial double precision support for SI

Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186177 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: SI support for 64bit ConstantFP

Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186178 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add double precision fsub pattern for SI

Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186179 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add fsqrt pattern for SI

Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186180 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Implement select and compares for SI

Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186181 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add support for f64 kernel arguments

Patch by: Niels Ole Salscheider

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186182 91177308-0d34-0410-b5e6-96231b3b80d8
Add a test for the 'o' option in llvm-ar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186183 91177308-0d34-0410-b5e6-96231b3b80d8
Relax test a bit to handle umask differences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186184 91177308-0d34-0410-b5e6-96231b3b80d8
Relax the test a bit more to handle different UIDs and GIDs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186186 91177308-0d34-0410-b5e6-96231b3b80d8
TargetTransformInfo: address calculation parameter for gather/scather

Address calculation for gather/scather in vectorized code can incur a
significant cost making vectorization unbeneficial. Add infrastructure to add
cost.
Tests and cost model for targets will be in follow-up commits.

radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186187 91177308-0d34-0410-b5e6-96231b3b80d8
ARM cost model: Add cost for gather/scather

Fixes a 35% degradation compared to unvectorized code in
MiBench/automotive-susan and an equally serious regression on a private
image processing benchmark.

radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186188 91177308-0d34-0410-b5e6-96231b3b80d8
X86 cost model: Add cost for vectorized gather/scather

radar://14351991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186189 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Remove the fpconst64.ll test which was failing on non-x86 buildbots

I'm guessing the failure had something to do with the double precision
floating point constant used in the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186191 91177308-0d34-0410-b5e6-96231b3b80d8