No longer need to install packages for travis-ci
Pull remaining edge sensitivities into macro
Running at 33.333MHz successfully
Cosmetics
Reducing states in Core

Multiplier works as expected when Exec is keyed on cyc[0] instead of
cyc[1]. ISE says the maximum frequency is 18.236MHz but it is running
at 33.333MHz at the moment. Further analysis to come.
Back down to 16MHz
Add ignores for core<->vga paths
Support for FPGAlink programmer for Nexys3

Default to using flcli to program the Nexys3 instead of djtgcfg
(Digilent Adept), which has issues with segfaulting on Linux. Ensure
the normal user has permission to access the appropriate /dev/bus/usb
device files.

This workflow has not been completely vetted on Linux, as `impact`
currently catches a sigsegv and exits, but this it likely related to
the fact that my Linux installation is 13.4 and the bitstream was
generated by my (Windows) 14.4 installation.
Out of phase startup to mend simulation
Allow Seg7 to compile in ISE simulation again
Refactoring, initialisations

Refactored some signals out of Exec into Core. Initialise Core state so
a reset after programming is not necessary.
Cosmetics, removing unused wires
Polishing xilinx and icarus tops
Pull out VGA blocks into their own module
Make icarus_top take PERIODS argument

Now you can specify, when simulating, how many clock periods to
simulate (default still 64). Makefile can have per-program PERIODS
definitions. Current run_fib definition is not realistic.
Cosmetics
Pull next-PC calculation out of Reg
Hoisting more PC calculations
Cosmetics in Reg
Switch from case to ifs for simpler logic