Minor context switch optimization

The interrupt ID is written into the stack such that it will be in %eax
after the popa instruction.  This eliminates an unnecessary store/fetch,
as well as a move to %eax since the ID is the return value of
context_switch().  This can (and should) be done with 'rc' as well.

Note: gcc produces really bad code if optimization isn't turned on,
rendering this useless.
More context switch optimization

'rc' is optimized similarly to 'iid' in the last commit.  That is, the
inline asm contraints are organized such that it lives in a register.
Cosmetic changes to ctsw.c and dispatch.c

The dispatcher now uses the 'isr_t' type for interrupt/syscall service
routines.
Add isr_t type to syntax file
Yet more context switch optimization

'psp' is arranged to be a local, register-resident value instead of a
global.  This is exactly the same optimization as for 'iid' and 'rc'
previously.
Simplify context switcher asm operands

The ISR_ENTRY macro is modified to accept a interrupt ID directly
instead of a string referring to an asm operand.  This required changing
the definitions for interrupt vectors to use preprocessor #defines
instead of an enum, so that they could be evaluated by the preprocessor
during the expansion of ISR_ENTRY.  This makes the various interrupt ID
operands unnecessary.