Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200500 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/testsuite/

2013-06-27  Meador Inge  <meadori@codesourcery.com>

	* gcc.dg/atomic-flag.c: Add dg-require-effective-target sync_*.
	* g++.dg/simulate-thread/atomics-2.C: Likewise.
	* g++.dg/simulate-thread/atomics-1.C: Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200501 138bc75d-0d04-0410-961f-82ee72b054a4
/cp
2013-06-28  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/57682
	* parser.c (cp_parser_save_member_function_body): Handle correctly
	curly braces in function-try-block mem-initializers.

/testsuite
2013-06-28  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/57682
	* g++.dg/cpp0x/initlist73.C: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200504 138bc75d-0d04-0410-961f-82ee72b054a4
ChangeLog:
* config/i386/bmiintrin.h (_bextr_u32): New.
(_bextr_u64): Ditto.

testsuite/ChangeLog:
* gcc.target/i386/bmi-1.c: Extend with new instrinsic.
Fix scan patterns.
* gcc.target/i386/bmi-1.c: Ditto.
* gcc.target/i386/bmi-bextr-4.c: New.
* gcc.target/i386/bmi-bextr-5.c: Ditto.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200505 138bc75d-0d04-0410-961f-82ee72b054a4
	PR middle-end/36041
	* libgcc2.c (POPCOUNTCST2, POPCOUNTCST4, POPCOUNTCST8, POPCOUNTCST):
	Define.
	(__popcountSI2): For __SIZEOF_INT__ > 2 targets use arithmetics
	instead of table lookups.
	(__popcountDI2): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200506 138bc75d-0d04-0410-961f-82ee72b054a4
2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/predicates.md (arm_cond_move_operator): New predicate.
	* config/arm/arm.md (movsfcc): Use arm_cond_move_operator predicate.
	(movdfcc): Likewise.
	* config/arm/vfp.md (*thumb2_movsf_vfp):
	Disable predication for arm_restrict_it.
	(*thumb2_movsfcc_vfp): Disable for arm_restrict_it.
	(*thumb2_movdfcc_vfp): Likewise.
	(*abssf2_vfp, *absdf2_vfp, *negsf2_vfp, *negdf2_vfp,*addsf3_vfp,
	*adddf3_vfp, *subsf3_vfp, *subdf3_vfpc, *divsf3_vfp,*divdf3_vfp,
	*mulsf3_vfp, *muldf3_vfp, *mulsf3negsf_vfp, *muldf3negdf_vfp,
	*mulsf3addsf_vfp, *muldf3adddf_vfp, *mulsf3subsf_vfp,
	*muldf3subdf_vfp, *mulsf3negsfaddsf_vfp, *fmuldf3negdfadddf_vfp,
	*mulsf3negsfsubsf_vfp, *muldf3negdfsubdf_vfp, *fma<SDF:mode>4,
	*fmsub<SDF:mode>4, *fnmsub<SDF:mode>4, *fnmadd<SDF:mode>4,
	*extendsfdf2_vfp, *truncdfsf2_vfp, *extendhfsf2, *truncsfhf2,
	*truncsisf2_vfp, *truncsidf2_vfp, fixuns_truncsfsi2, fixuns_truncdfsi2,
	*floatsisf2_vfp, *floatsidf2_vfp, floatunssisf2, floatunssidf2,
	*sqrtsf2_vfp, *sqrtdf2_vfp, *cmpsf_vfp, *cmpsf_trap_vfp, *cmpdf_vfp,
	*cmpdf_trap_vfp, <vrint_pattern><SDF:mode>2):
	Disable predication for arm_restrict_it.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200510 138bc75d-0d04-0410-961f-82ee72b054a4
2013-06-28  Marc Glisse  <marc.glisse@inria.fr>

	PR c++/57509
	* g++.dg/ext/pr57509.C: Pass vectors by reference to avoid warnings.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200511 138bc75d-0d04-0410-961f-82ee72b054a4
2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm.md (arm_mulsi3_v6): Add alternative for 16-bit
	encoding.
	(mulsi3addsi_v6): Disable predicable variant for arm_restrict_it.
	(mulsi3subsi): Likewise.
	(mulsidi3adddi): Likewise.
	(mulsidi3_v6): Likewise.
	(umulsidi3_v6): Likewise.
	(umulsidi3adddi_v6): Likewise.
	(smulsi3_highpart_v6): Likewise.
	(umulsi3_highpart_v6): Likewise.
	(mulhisi3tb): Likewise.
	(mulhisi3bt): Likewise.
	(mulhisi3tt): Likewise.
	(maddhisi4): Likewise.
	(maddhisi4tb): Likewise.
	(maddhisi4tt): Likewise.
	(maddhidi4): Likewise.
	(maddhidi4tb): Likewise.
	(maddhidi4tt): Likewise.
	(zeroextractsi_compare0_scratch): Likewise.
	(insv_zero): Likewise.
	(insv_t2): Likewise.
	(anddi_notzesidi_di): Likewise.
	(anddi_notsesidi_di): Likewise.
	(andsi_notsi_si): Likewise.
	(iordi_zesidi_di): Likewise.
	(xordi_zesidi_di): Likewise.
	(andsi_iorsi3_notsi): Likewise.
	(smax_0): Likewise.
	(smax_m1): Likewise.
	(smin_0): Likewise.
	(not_shiftsi): Likewise.
	(unaligned_loadsi): Likewise.
	(unaligned_loadhis): Likewise.
	(unaligned_loadhiu): Likewise.
	(unaligned_storesi): Likewise.
	(unaligned_storehi): Likewise.
	(extv_reg): Likewise.
	(extzv_t2): Likewise.
	(divsi3): Likewise.
	(udivsi3): Likewise.
	(arm_zero_extendhisi2addsi): Likewise.
	(arm_zero_extendqisi2addsi): Likewise.
	(compareqi_eq0): Likewise.
	(arm_extendhisi2_v6): Likewise.
	(arm_extendqisi2addsi): Likewise.
	(arm_movt): Likewise.
	(thumb2_ldrd): Likewise.
	(thumb2_ldrd_base): Likewise.
	(thumb2_ldrd_base_neg): Likewise.
	(thumb2_strd): Likewise.
	(thumb2_strd_base): Likewise.
	(thumb2_strd_base_neg): Likewise.
	(arm_negsi2): Add alternative for 16-bit encoding.
	(arm_one_cmplsi2): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200513 138bc75d-0d04-0410-961f-82ee72b054a4
2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/constraints.md (Ts): New constraint.
	* config/arm/arm.md (arm_movqi_insn): Add alternatives for
	16-bit encodings.
	(compare_scc): Use "Ts" constraint for operand 0.
	(ior_scc_scc): Likewise.
	(and_scc_scc): Likewise.
	(and_scc_scc_nodom): Likewise.
	(ior_scc_scc_cmp): Likewise for operand 7.
	(and_scc_scc_cmp): Likewise.
	* config/arm/thumb2.md (thumb2_movsi_insn):
	Add alternatives for 16-bit encodings.
	(thumb2_movhi_insn): Likewise.
	(thumb2_movsicc_insn): Likewise.
	(thumb2_and_scc): Take 'and' outside cond_exec.  Use "Ts" constraint.
	(thumb2_negscc): Use "Ts" constraint.
	Move mvn instruction outside cond_exec block.
	* config/arm/vfp.md (thumb2_movsi_vfp): Add alternatives
	for 16-bit encodings.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200515 138bc75d-0d04-0410-961f-82ee72b054a4