Redefinition of the VM after carefully considering RT, PPC and X86

Everything is now based on RT, but with 3 registers removed (LEXENV, NSP, NFP).
LEXENV is removed, since one PPC backend comment suggests that its a waste
to blow a register on this. The NSP and NFP are removed after taking the decision
to stick with no separate number stack, so these become useless.

The 3 empty register slots are taken by PC, LR and THREAD (it seems that RT has
16 GP registers + PC and maybe LR, but ARM has only 16, including PC and LR)
And since we want threads, we need 1 register for thread-base