coresight: DT support for etr to usb output on 8974

Add coresight CSR (CoreSight Slave Registers) device and BAM register
definition for TMC-ETR to support ETR to USB output.

Change-Id: I1f9081a0a684a9a6d5b08361be1e09c323a2d4fe
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
coresight: take care of tmc etr wrap around & offset calculation

Ensure that buffer pointer points to the right location while
trying to read TMC in ETR circular buffer mode when we wrap
around.

TMC in ETR circular buffer mode tracks the physical address
in the RWP register (in contrast to pure offsets). Hence
subtract it from the base physical address to get the offset.

Change-Id: Ice1170dcd63928dd8304c421800848e036386b88
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
coresight: only use etm0 for populating configuration

With maxcpus=1, only core0 will be running with other cores in
reset until they are explicitly hotplugged on. To avoid reading
ETM registers for cores that are in reset during probe, use only
ETM0 for populating configuration info. For other ETM probes,
copy the info from ETM0.

Change-Id: I9ae4539b004956a026e919323413f9e3c7d5ba4a
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
coresight: reserve memory for tmc etr carve out

Memory reservation is now required for carve outs. Add appropriate
memory reservation driver support for the TMC ETR carve out.

Change-Id: I31cda1317d31555b70a034eae4c6fdadacd36fdb
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
coresight: allow usage of all ports for 8064

8064 funnel has 8 ports so allow all to be used. Typo corrections.

Change-Id: I2a442048a2100ab07f34d453f538f89babd9d514
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
coresight: A DLKM to abort trace on userspace abort

A DLKM to abort tracing on an user space data, prefetch or
undefined instruction abort.

Change-Id: Iaba14628601ea6d3649e05423f8570131eea39f7
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>

Conflicts:
	drivers/coresight/Kconfig
	drivers/coresight/Makefile
coresight: use ETMPDCR instead of ETMCR for ETM power/clock control

Use ETMPDCR instead of ETMCR for ETM power/clock enable/disable. ETMPDCR
doesn't have corresponding cp14 access and hence will help with subsequent
multicore ETM support changes for 8974. ETMPDCR is available for PFTv1.1
and ETMv3.5 compliant ETM implementations.

Change-Id: I4b190b963cda29b406971cf075db36213b140495
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
coresight: cp14 support for etm driver for krait v3

Use cp14 accesses to ETM registers for Krait v3 to avoid
limitations with memory mapped accesses.

Change-Id: Ia956eb0f5b45c748ffb5dd13dd14dc9595b9c68a
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>

Conflicts:
	drivers/coresight/coresight-etm.c
	drivers/coresight/coresight-priv.h
coresight: ignore multiple calls to coresight_abort

coresight_abort allows for abruptly stopping the current sink from
accepting new data hence avoiding polluting trace with information
after the point of interest.

Depending upon the call site, coresight_abort could end up getting
called more than once. This change will help with ignoring
subsequent calls to coresight_abort so that abort callback is
called just once. This is in line with treating abort as a one time
abrupt stop.

Change-Id: I634001e832ee7fa1b23f67698bd2d5dd12f8d65d
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
coresight: explicitly control ETMCR & preserve prog & power down bits

Explicitly clear and set ETMCR power down bit as part of the ETM
register programming sequence since if this bit is set, writes to
some registers and fields might be ignored.

Moreover, ETMCR prog and power down bits are not directly modifiable
via the sysfs based MODE selction code. Instead they can implicitly get
modified by other code. So always preserve their values while
enabling ETM trace since the ctrl is a shadow of ETMCR bits that
are only modifiable via the sysfs based MODE selection code.

Change-Id: I842a42acdafb112759a1787ec6fc41140812020d
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>

Conflicts:
	drivers/coresight/coresight-etm.c
Fixxor things
coresight: Export coresight-stm header to userspace

Export coresight-stm header for userspace STM logging
definitions.

Change-Id: I75923ea8beea36269995e311c3fbb2667beac3cc
Signed-off-by: David Ng <dave@codeaurora.org>

Conflicts:
	include/linux/Kbuild
coresight: use 2K block size transfers for output via usb

For better throughput and to avoid limitations, use 2K block size
tranfers when outputting data over usb using ETR. Moreover, USB 3.0
currently only supports 2K block size for the descriptors.

Change-Id: Idc68c4d503e3ccca7715d3cbec21daedfbc2df6f
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>

Conflicts:
	drivers/coresight/coresight-csr.c
coresight: resolve pcsave and etm tracing concurreny issue

Always clear ETMCR[pwrdwn] while enabling trace. This is used as
a logic enable and is a pre-requisite while enabling trace. So
switch to an implementation that does this and removes the save
and restore for pwrdwn and pwrup.

Change-Id: I8a14efe8fd76368ed1e177a701013a504aa1876f
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>

Conflicts:
	drivers/coresight/coresight-etm.c
coresight: graceful pcsave enable/disable for offline cores

Fail pcsave enable/disable if the core is offline so that it is
obvious to the user that the operation failed.

Change-Id: I2bd88636e1982a7de6b14f8b742d1f9bc7d23406
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>

Conflicts:
	drivers/coresight/coresight-etm.c
coresight: graceful etm enable/disable for offline cores

Fail ETM enable if the core is offline so that it is obvious to
the user that the operation failed. ETM disable cannot fail so
disable ETM during hotplugg off if it is user enabled and
re-enable ETM during hotplugg on if it is user enabled.

Change-Id: I24120582ff6d3c5f3598baff962dc2ef910c3a1e
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>

Conflicts:
	drivers/coresight/coresight-etm.c
coresight: add STM support for explicit userspace entity ids

Add support to transport data sent using userspace library over
STM. Data stream will contain the entity id, protocol id and
options.

Change-Id: I5bd1810338fd13373bbad7de559765002c43c500
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>

Conflicts:
	include/linux/coresight-stm.h
coresight: 9625: Modify ETM driver to support ETMv3.5

MSM9625 implements ETM based on ETM version 3.5.
As such the 9625 ETM registers need some additonal configuration
for ETM to be functional. They also have some extra registers which
need to be configured properly while some registers currently being
configured by the driver are absent on 9625. Additonally, the ETMv3.5
can be configured to support data tracing, support for which is
not present in the existing ETM driver.

Change-Id: Ic3e61d0d1abf371653a398a28111b308747a7b6f
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>

Conflicts:
	drivers/coresight/coresight-etm.c
	include/linux/coresight.h
Update printk to upstream
ARM: dma-mapping: use asm-generic/dma-mapping-common.h

This patch modifies dma-mapping implementation on ARM architecture to
use common dma_map_ops structure and asm-generic/dma-mapping-common.h
helpers.

Change-Id: I574a3b5ac883cd5d9beb79deef8f5cb44fd83296
[lauraa: conflicts due to code cruft/context changes]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-By: Subash Patel <subash.ramaswamy@linaro.org>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>