Setup the PCIE Fast Training Sequence (FTS) value to prevent
transmit hangs for 57766 and non Ax versions of 57765.
While here, correct definition of BGE_CHIPREV_57765_AX.
Recognize BCM5725C PHY.
Add support for upcoming BCM5725 (ASIC 5762) controller.  This is a
new 1Gb server controller chip that will be going into production
soon.
BCM5725 combines MAC with triple-speed PHY, a Network Controller
Sideband Interface (NC-SI) and on-chip memory buffer in a single
device.  BCM5725 has an Application Processing Engine (APE) that is
capable of on-chip management and offloading features.  BCM5725
supports high-precision clock, time stamp registers for
receive/transmit packets and programmable trigger inputs and
watchdog timeouts. These new features are not yet supported by
bge(4).
Many thanks to Broadcom for continuing to support FreeBSD!

Submitted by:	Geans Pin geanspin@Broacom (initial version)
Reviewed by:	Geans Pin geanspin@Broacom
H/W donated by:	Broadcom
Start adding support to build bits of our code using the Thumb-2
instruction set. Thumb-2 requires an if-then instruction to implement
conditional codes.

When building for ARM mode the it-then instructions do not generate any
assembled instruction as per the ARMv7-A Architecture Reference Manual, and
are safe to use.

While this allows the atomic instructions to be built, it doesn't mean we
fully support Thumb code. It works in small tests, but is still known to
fail in a large number of places.

While here add a check for the armv6t2 architecture.
Allow the code to be compiled without warnings for any combination
of INET, INET6 and SCTP_DEBUG defines.
The issue was reported by Lally Singh.

MFC after: 2 weeks
id_t is 64bit, provide the compat32 wrapper for clock_getcpuclockid2(2).

Reported and tested by:	Petr Salinger <Petr.Salinger@seznam.cz>
PR:	threads/180652
Sponsored by:	The FreeBSD Foundation
Regenerate
Use the right name for the vm_map_find(9) flag to specify shared
mapping.  The MAP_SHARED and MAP_INHERIT_SHARE values are identical.

Noted by:	alc
MFC after:	3 days
fuse: revert birthtime support.

The creation time support breaks the data structures used in linux
fuse.  libfuse carries it's own header.

Revert the changes for now. We will try to get an agreement with the
fuse  upstream maintainers to avoid having to patch the library
headers all the time.
Add cast to (void *) to the following cases to suppress warnings by
-Wcast-align.  These do not increase the alignment requirement:

- rtm = (struct rt_msghdr *)(rtm + rtm->rtm_msglen)
- struct sockaddr *sa = &sa0; sX = (struct sockaddr_X *)sa
Show "default" for the zero-filled address consistently when nflag == 0.
- Simplify getaddr() and print_getmsg() by using RTAX_* instead of RTA_*
  as the argument.
- Reduce unnecessary loop in print_getmsg().
Fix address range specification with ifconfig(8) options such as:

- inet 192.0.2.1-10 netmask 255.255.255.0 (inet range spec + ifconfig options)
- inet6 2001:db8:1::1-f prefixlen 60 (inet6 range spec + ifconfig options)

If prefixlen or netmask option is specified with CIDR notation at
the same time, the option is used.

Tested by:	Michael Grimm
MFC after:	3 days
The NFSv4 server incorrectly assumed that the high order words of
the attribute bitmap argument would be non-zero. This caused an
interoperability problem for a recent patch to the Linux NFSv4 client.
The Linux folks have changed their patch to avoid this, but this
patch fixes the problem on the server.

Reported and tested by:	Andre Heider (a.heider@gmail.com)
MFC after:	3 days
Add two new CPU specific definitions - the watchdog clock frequency and
the UART clock frequency.

The AR933x and AR934x have separate PLL settings for these.
Initialise the watchdog and UART frequencies.

For all pre-AR933x chips, the frequency is just the APB frequency.
For the AR933x, the UART frequency is different but we just hacked around
it.

For the AR934x, there's a different PLL setting for these, so they have
to be broken out.
Use the UART frequency when programming the UART clock.

This allows the 16550 support to work correctly on the upcoming
AR934x support.
Teach the GPIO code about the AR934x GPIO register and pin counts.
Implement some initial AR934x support routines.

This code reads the PLL configuration registers and correctly programs
things so the UART and such can come up.

There's MIPS74k platform issues that need fixing; but this at least brings
things up enough to echo stuff out the serial port and allow for interactive
debugging with ddb.

Tested:

* AR71xx SoCs
* AR933x SoC
* AR9344 board (DB120)

Obtained from:	Qualcomm Atheros; Linux/OpenWRT
Add some initial board support for the AR934x and the Qualcomm Atheros
DB120 development board.

The AR934x SoCs are a MIPS74k based system with increased RAM addressing
space, some scratch-pad RAM, an improved gige switch PHY and 2x2 or 3x3
on-board dual-band wifi.

This support isn't complete by any stretch; it's just enough to bring
the board up for others to tinker with.  Notably, the MIPS74k support
is broken.  However it boots enough to echo some basic probe/attach
messages, before dying somewhere in the TLB code.

Thankyou to Qualcomm Atheros for their continued support of me doing
open source work with their hardware.

Tested:

* AR9344, mips74k