Don't vectorize if there are outside loop users of the induction variable.

We would have to compute the pre increment value, either by computing it on
every loop iteration or by splitting the edge out of the loop and inserting a
computation for it there.

For now, just give up vectorizing such loops.

Fixes PR17179.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190790 91177308-0d34-0410-b5e6-96231b3b80d8
AsmMatcher: emit subtarget feature enum in deterministic order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190792 91177308-0d34-0410-b5e6-96231b3b80d8
TableGen: give asm match classes deterministic order.

TableGen was sorting the entries in some of its internal data
structures by pointer. This order filtered through to the final
matching table and affected the diagnostics produced on bad assembly
occasionally.

It also turns out STL algorithms are ridiculously easy to misuse on
containers with custom order methods. (No bugs before, or now that I
know of, but plenty in the middle).

This should fix the sanitizer bot, which ends up with weird pointers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190793 91177308-0d34-0410-b5e6-96231b3b80d8
[PowerPC] Fix PR17155 - Ignore COPY_TO_REGCLASS during emit.

Fast-isel generates a COPY_TO_REGCLASS for widening f32 to f64, which
is a nop on PPC64.  This is needed to keep the register class system
happy, but on the fast-isel path it is not removed before emit as it
is for DAG select.  Ignore this op when emitting instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190795 91177308-0d34-0410-b5e6-96231b3b80d8
TableGen: fix constness of new comparison function.

libc++ didn't seem to like a non-const call operator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190797 91177308-0d34-0410-b5e6-96231b3b80d8
Add testcase for r190631

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190807 91177308-0d34-0410-b5e6-96231b3b80d8
[CMake] Hack GetSVN.cmake to handle unusual terminals.

I got a report of a hang in git's helper functions trying to figure out
how to display results of "git svn info" when run inside ninja, even though
the result is immediately piped to grep. This seems to avoid that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190808 91177308-0d34-0410-b5e6-96231b3b80d8
Use reference instead of copy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190813 91177308-0d34-0410-b5e6-96231b3b80d8
Add Atom Silvermont (slm) tests

- check that -mcpu=slm uses the call register indirect optimization
- check that -mcpu=slm runs the scheduler 
- check that -mcpu=slm supports the movbe instruction



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190814 91177308-0d34-0410-b5e6-96231b3b80d8
MemCpyOptimizer: Use max legal int size instead of pointer size

If there are no legal integers, assume 1 byte.

This makes more sense than using the pointer size as
a guess for the maximum GPR width.

It is conceivable to want to use some 64-bit pointers
on a target where 64-bit integers aren't legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190817 91177308-0d34-0410-b5e6-96231b3b80d8
Debug info: Fix PR16736 and rdar://problem/14990587.
A DBG_VALUE is register-indirect iff the first operand is a register
_and_ the second operand is an immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190821 91177308-0d34-0410-b5e6-96231b3b80d8
Be sure we run ARM tests only when an ARM backend is present.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190822 91177308-0d34-0410-b5e6-96231b3b80d8
simplify expression

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190826 91177308-0d34-0410-b5e6-96231b3b80d8
mention command line parameters

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190827 91177308-0d34-0410-b5e6-96231b3b80d8
[SelectionDAG] Teach the vector scalarizer about TRUNCATE.

When a truncate node defines a legal vector type but uses an illegal
vector type, the legalization process was splitting the vector until
<1 x vector> type, but then it was failing to scalarize the node because
it did not know how to handle TRUNCATE.

<rdar://problem/14989896>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190830 91177308-0d34-0410-b5e6-96231b3b80d8
Implement 3 AArch64 neon instructions : umov smov ins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190839 91177308-0d34-0410-b5e6-96231b3b80d8
Make a more clear AVX-512 section header that matches similar in the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190843 91177308-0d34-0410-b5e6-96231b3b80d8
Fix column alignment. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190849 91177308-0d34-0410-b5e6-96231b3b80d8
Add AES and SHA instructions to the load folding tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190850 91177308-0d34-0410-b5e6-96231b3b80d8
AVX-512: Converted to Unix style

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190851 91177308-0d34-0410-b5e6-96231b3b80d8