Grammar and punctuation fixes.
No content changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179540 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify the MCInst operator iterator declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179541 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a typo in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179542 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Emit ELF formatted code rather than raw ISA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179544 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Emit configuration value in the .AMDGPU.config ELF section

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179545 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Emit config values in register value pairs.

Instead of emitting config values in a predefined order, the code
emitter will now emit a 32-bit register index followed by the 32-bit
config value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179546 91177308-0d34-0410-b5e6-96231b3b80d8