fx3_firmware: disable multi DMA channel utilization for TX

Currently the FPGA tells the FX3 which of 4 (2 for RX and 2 for TX) "threads" to
use. These threads are actually hardware DMA engines. When multi DMAing occurs
for TX, 0-indexed DMA threads 2 and 3 are interleaved to copy data from the USB
to the FX3 GPIF port. However, there appears to be a bug in this interface
because as thread 2 is running, it will display the first word of thread 3
momentarily. The current solution is to downgrade to using a singel DMA channel,
which can easily handle upwards of 200MB/s of data per second; hence there
should be no performance hit.
hdl: fix TX path so that it only uses DMA thread 3

This commit contains the HDL fixes neccessary to make the FPGA only use DMA
thread 3.
fx3_firmware: disable multi DMA channel utilization for RX

This commit makes the FX3 default to using DMA thread 0 as the single DMA engine
for transferring RX samples. The reason is the same as for the TX thread change
2 commits ago.
hdl: fix RX path so that it only uses DMA thread 0

This commit contains the HDL fixes neccessary to make the FPGA only use DMA
thread 0 for RX.
Merge remote-tracking branch 'rob/txfixed' into dev-cli
nocommit: tx fix pt2
Merge remote-tracking branch 'rob/txfixed' into dev-cli
fpga: Adding rx signals signaltap file.