cores: mt48lc16m16a2: core is now fetched from micron's url

Import Micron's original file and add patches for:

- changing EOL from Dos to Linux,
- add an parameter to clear the SDRAM before it is used,
- add tasks to get/set bytes/sorts in the whole memory,
- turn off the debug messages.

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Merge branch 'for-openrisc' of https://github.com/skristiansson/orpsoc-cores
cores: mt48lc16m16a2: change MEM_SIZES to lower case in patch 0004

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
wb_intercon: assert wbm_err_o on non-match accesses

Instead of falling back to the first slave when no match occur,
signal a wishbone error. If fallback behaviour is desired,
it's still acheivable by extending the range of the slave
to which the fallback is desired.
avalon_to_wb_bridge: abort read on wbm_err_i
cores: add vga_lcd core

This adds the vga_cld core from opencores, with two accompanying
patches.
One for a typo of a signal and one for fifo auto resync.