lpc43xx/uart: Add missing BEGIN/END_DECLS
lpc43xx: Update linker scripts
lpc43: Use uint*_t instead of u*
lpc43xx/ssp: Add ssp_transfer
lpc43xx/gpdma.csv: Fix INTSTAT register name
lpc43xx: Add script to convert CSV files to YAML
lpc43xx: Move YAML OrderedDict code to separate module
lpc43xx/gen.py: Take YAML input
lpc43xx: Convert register definitions to YAML
lpc43xx: Clean up linker script breakage from merge
lpc43xx/ssp: Fix duplicate function definition from merge
Makefile: Install everything in scripts/
lpc43xx/uart: Uncomment register definitions
lpc43xx/uart: Kill _BITMASK definitions for single-bit fields
lpc43xx/uart: Fix TER register definition

I'm not sure why bit 7 and offset 0x30 were used previously. Revision
1.6 of UM10503 claims that the TXEN bit is bit 0 in all UARTs' TER
registers.
lpc43xx/uart: Fix code style
lpc32xx_ram_only.ld: Fix region name
Remove dead lpc43xx_m0/vector.c
lpc43xx: Move M4 specific files to m4/
lpc43xx: Add irq.yaml for M0 core