Initial BLIF code generator.

Add the -tblif code generator target, and include some basic
useful behavior.
Implement the ivl_target ivl_scope_child functions.

These are a more convenient way of iterating through child scopes.
Implement blif support for constants and some logic/lpm gates.

This starts the handling of various logic gates.
Follow non-canonical bit numbering.

The signal bit numbering should be used for signals. This is
necessary for .model ports because the user specified numbers
are part of the interface, but once that is done, it is trivial
to follow it internally as well.
blif nex_data_t collects name data early.

It is possible for the get_name_index() method to be called before
the get_name() method, so need to handle that case.
Add some more basic logic gates to blif target.
Add a README-BLIF.txt file for the blif target.
Fix handling of certain constants in ivl_target.h API.

The construction of the ivl_design_t consts member was broken,
not properly handling the addition of new objects.
Add blif target to RPM package.
Support blif emit of IVL_LPM_ADD device.
Generate blif code for IVL_LPM_SUB device.
BLIF support for IVL_LPM_CMP_EQ and IVL_LPM_CMP_NE
blif support for unsigned magnitude comparison.
blif support for bit selects.
Add blif LIB_RE_* gates support.
Add BLIF support for ternary (MUX) operators.
Merge branch 'master' of git://github.com/steveicarus/iverilog