[CORE] vmm_vcpu_irq: refactor a bit of code

Signed-off-by: Jean-Christophe DUBOIS <jcd@tribudubois.net>
[ARM] mmu_lpae: Use lite version of spin lock APIs

To avoid dependency on vmm_scheduler_preempt_xxx() APIs and to
improve things a bit we use lite version of spin lock APIs in
MMU LPAE.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_host_ram: Use lite version of spin lock APIs

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_host_vapool: Use lite version of spin lock APIs

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] mmu_lpae: Make _setup_initial_ttbl() suitable for both arm32ve and arm64

The aarch64 compiler treats "&a" as address of global variable "a"
relative to current PC. In other words, "&a" for global variable "a"
mean PC + relative offset of "a". This way of treating "&a" is good
but breaks _setup_intial_ttbl() which assumes that "&a" is link time
absolute address of global variable "a".

This patch fixes above described issue in _setup_initial_ttbl() so
that it is suitable for both arm32ve and arm64.

Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Sukanto Ghosh <sukantoghosh@gmail.com>
[ARM] unify ARM32 and ARM32VE lock implementation.

Signed-off-by: Jean-Christophe DUBOIS <jcd@tribudubois.net>
[EMULATORS] virtio_console: Minor fix for read operation on emerg_wr

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Add config option for selecting common locking implementation

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_vcpu_irq: Fix vmm_vcpu_irq_deassert() semantics

The patch "[CORE] vmm_vcpu_irq.c: refactor a bit the code" changed
vmm_vcpu_irq_deassert() and forece vcpu irq deassert request to be
ordered after vcpu irq assert request. In other words, we can only
deassert vcpu irq if it was asserted previously else dessert request
is ignored.

In case of ARM32VE (or any architecture that supports vcpu irq assert
and vcpu irq deassert), it is not mandatory that vcpu irq deassert
will always follow vcpu irq assert. The ordering of vcpu irq assert
and vcpu irq deassert is architecture dependent. In case of ARM32VE,
the generic timer code induces a vcpu irq deassert before vcpu irq
assert via GIC emulator to route HW virtual timer irq to VCPU.

This patch again makes vcpu irq assert and vcpu irq deassert
unordered.

Signed-off-by: Anup Patel <anup@brainfault.org>
[LIBS] Add API to clear or empty the FIFO

Signed-off-by: Anup Patel <anup@brainfault.org>
[EMULATORS] virtio_console: Clear emerg_rd fifo upon reset

The emerg_rd fifo of virtio_console is always capturing Rx data
hence we need to clear previous content when virtio_console
device is reset.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_guest_aspace: Fix is_region_overlapping() for adjacent regions

If we have two regions A and B adjacent to each other in guest physical
address space then is_region_overlapping() will fail if device tree node
for region B is before region A under guest aspace node.

This patch fixes above described issue in is_region_overlapping().

Signed-off-by: Anup Patel <anup@brainfault.org>
Merge remote-tracking branch 'upstream/master' into new_work