Linux 3.0.82
mm/oom_kill.c (affects lowmemorykiller): prevent changing oom_score_adj if its value is -1000

This should prevent that the Android OS automatically changes
its value if oom_adj -17 or oom_score_adj -1000 were explicitly
set by the user. To gain control over the variable again,
oom_adj has to be set to anything higher than -17.

Also: compare p->signal->oom_score_adj with OOM_SCORE_ADJ_MIN instead
of static value.
Add C4 state again since TI guys added it to omapzoom - big props to Ezekeel that discovered this patch before and TI used it on their own official tree.
Added Overclock/Underclock
GPU to 384 MHz

Signed-off-by: Amperific <amperific@gmail.com>

Conflicts:
	arch/arm/mach-omap2/opp4xxx_data.c

Conflicts:
	arch/arm/mach-omap2/opp4xxx_data.c
Fixed copy+paste error
Fix: Set GPU OC properly
omap44xx: cpuidle: Update target residencies to saner values

The current values are insane.

There is no possible way power saving
can be attained by heading into C4 for not much more than 1ms. The average
values are in the 20ms range, so why do we need to even entertain entering
at much lower values when we will use more power than we save in doing so.

The actual recommended values are shown in 79e796f7b993bd82ad108fa488c35ddd1b9387eb
but for some obscure reason, in 16385c726d55f9e84bbc60ff9e329a84d56a13a3 and
22e2193661b6bffcfdc1a4d17f6af0d1782ba860 they were updated to match the exit_latency.

This seems horribly wrong to me as there comes a point when the target residency is
so low that you use more power actually entering the state than you gain from the
insignificant amount of time you spend there.

With the values in this commit, C4 state is used for >95% of the time when the screen
is off, with C3 picking up the remainder.
During audio playback, C4 is used ~50% of the time, C3 is used ~25% of the time and C2
picks up whatever is left.

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
OMAPDSS:DISPC: Gamma feature implementation

I think this code needs more work: beta in leanKernel for now.

This patch enables the gamma table to be loaded. Gamma value
can range from 0.2 to 2.0 in steps of 0.2 and thus they have
indices from 1 to 10 correspondingly. To disable gamma, value
shall be set to zero. The different values of gamma can also
be used to alter the brightness level of image.

Change-Id: I212a33f5b87c6510ba36720594378affa9ed5bba
Signed-off-by: Sujeet Barnawal <s-baranwal@ti.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Added Color Control version 4.

Conflicts:

	drivers/misc/Kconfig
	drivers/misc/Makefile

Conflicts:

	drivers/misc/Kconfig
	drivers/misc/Makefile
My contrast control from ICS.
Added Fast Charge by Chad Froebel
Auto detects if its a charger in the OTG cable, if it is, charges, if it isnt, uses default OTG. - all work from caioketo

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Added Battery Life eXtender (BLX) version 1. - From Ezekeel

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>

Conflicts:

	drivers/misc/Kconfig
	drivers/misc/Makefile
mm.h: Increase READAHEAD value to 1024
Hardcoded swappiness = 0
lib/crc: add slice by 8 algorithm to crc32.c

Add support for slice by 8 to existing crc32 algorithm.  Also modify
gen_crc32table.c to only produce table entries that are actually used.
The parameters CRC_LE_BITS and CRC_BE_BITS determine the number of bits in
the input array that are processed during each step.  Generally the more
bits the faster the algorithm is but the more table data required.

Using an x86_64 Opteron machine running at 2100MHz the following table was
collected with a pre-warmed cache by computing the crc 1000 times on a
buffer of 4096 bytes.

BITS Size LE Cycles/byte BE Cycles/byte
----------------------------------------------
1 873 41.65 34.60
2 1097 25.43 29.61
4 1057 13.29 15.28
8 2913 7.13 8.19
32 9684 2.80 2.82
64 18178 1.53 1.53

BITS is the value of CRC_LE_BITS or CRC_BE_BITS. The old
default was 8 which actually selected the 32 bit algorithm. In
this version the value 8 is used to select the standard
8 bit algorithm and two new values: 32 and 64 are introduced
to select the slice by 4 and slice by 8 algorithms respectively.

Where Size is the size of crc32.o's text segment which includes
code and table data when both LE and BE versions are set to BITS.

The current version of crc32.c by default uses the slice by 4 algorithm
which requires about 2.8 cycles per byte.  The slice by 8 algorithm is
roughly 2X faster and enables packet processing at over 1GB/sec on a
typical 2-3GHz system.

Signed-off-by: Bob Pearson <rpearson@systemfabricworks.com>
Cc: Roland Dreier <roland@kernel.org>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
sync.c: add a module_param to fsync() calls. fsync is still disabled by default but users will have the choice of having a faster build or a safer build (for data integrity). Props for simms for busting my ass off with this one :)
Added PegasusQ Governor
Added InteractiveX v2 Governor and fixed PegasusQ