[vga_timing] changed scan_x/y back to std_logic_vectors
[top] initialized reset switch before begin block and removed negative edge reset switch
[top] added conditional expression for z80 rd/wr
[top] changed bit width value from 4 to 8
[sggoc] cleaned up cartridge a bit
[sggoc] added rst to sensativity list
[sggoc] removed negative edge reset signal
[sggoc] added conditional expressions for vdp_data signals
[sggoc] cleaned up vdp and initialized register bram
[sggoc] initialized CRAM block to 0
[sggoc] changed ntsc line to hit at top of palette and used shift_right instead of srl
[sggoc] added conditional expressions for signals
[sggoc] cleaned up vdp background a bit
[sggoc] removed unnecessary comment line