Verilog files providing jtag-uart functionality

Copy the content of the verilog files to orpsoc/rtl/verilog/uart16550
Modify orpsoc/boards/altera/de0_nano/rtl/verilog/orpsoc_top/orpsoc_top.v:

near to the line 1878
replace
uart16550 uart16550_0
to
uart16550_jtag uart16550_0

Recompile orpsoc with Quartus
create a .jic(see our Makefile)
program the board
disconect and reconnect the board's USB cable
open nios2-terminal: You should see u-boot booting linux