pexaria5: output pps and debug clock on blackcat

This patch adds the two LVDS outputs on the blackcat addon.
It outputs pps for general-purpose phase comparison between cards.
It outputs the ref clock pin to compare against pps for fPLL issue.
exploder: incorrect eca wiring description
pexaria5db1: prototype top file

To actually use this you need:
1- a modified board with WR clock repositioned
2- ref_pll5 with two new outputs:
  clk3: 1GHz, 0 phase, 50% duty
  clk4: 125MHz, 6500 phase, 13% duty
build: enable sdbfs + ppsi + eb-w1-write
Merge branch 'master' of github.com:stefanrauch/bel_projects