Convert mixed line endings in Altera .qsf file to UNIX.
Allowed Quartus II to update LAST_QUARTUS_VERSION.
Added phy_init.v to project files.
Flip around bit order on phy<n>_addr signals.
Change phy_init bootstrapping pins to output only. They can coexist with other uses that are input-only.
Change tx_clks from outputs to inputs for MII interfaces.
Add pins for UART on DE2-115.
Set CLK_50 input to 3.3V VCCIO.
Tie down unused pins.
Rework reset switch capture.
Remove "_gm" from phy_init names.
Rename reset_n to reset_i, use positive assertion.
Rename PHY init signals. Break into separate strapping and MIIM-not-ready phases.
Pull bootstrapping values into separate variables/wires.
Add MII passthrough module and top-level connections.
Pipe packet and nibble counts to DE2-115 LED displays, selectable by SW[0] and SW[1] positions.
FIFO module for packet RX->TX buffering.
UART for transmitting RX or TX data to host for debugging.
Basic constraints file.
Project changes for added files.
Fix small amount of commit-breakage from me trying to separate my commits.