OpenCL lookahead

OpenCL support is compiled in by default, but must be enabled at runtime by an
--opencl command line flag. Compiling OpenCL support requires perl. To avoid
the perl requirement use: configure --disable-opencl

When enabled, lookahead thread is mostly off-loaded to your OpenCL capable GPU
device.  Lowres intra cost prediction, lowres motion search (including subpel)
and bidir cost predictions are all done on the GPU.  MB-tree and final slice
decisions are still done by the CPU.  Presets which do not use a threaded
lookahead will not use OpenCL at all (superfast, ultrafast).

Because of data dependencies, the GPU must use an iterative motion search which
performs more total work than the CPU would do, so this is not work efficient
or power efficient. But if you have spare GPU cycles to spare, it can often
speed up your encode. Output quality when OpenCL lookahead is enabled is often
slightly worse in quality than the CPU quality (because of the same data
dependencies).

x264 must compile its OpenCL kernels for your device before running them, and in
order to avoid doing this every run it caches the compiled kernel binary in a
file named x264_lookahead.clbin (--opencl-clbin FNAME to override).  The cache
file will be ignored if the device, driver, or OpenCL source are changed.

x264 will use the first GPU device which supports the required cl_image
features required by its kernels. Most modern discrete GPUs and all AMD
integrated GPUs will work.  Intel integrated GPUs (up to IvyBridge) do not
support those necessary features. Use --opencl-device N to specify a number of
capable GPUs to skip during device detection.

New in this patch version:
* An MD5 hash of the OpenCL source is written to clbin file and verified on read
* out-of-tree builds have been fixed
* GPU detection has been improved; all GPUs in each platform checked
* Switchable graphics environments are detected (Intel iGPU, AMD dGPU) and
  OpenCL is disabled
* Added param.opencl_device_id so API users can pass in an explict cl_device_id
* Fixed minor issue that caused AMD and NV outputs to diverge slightly
* .gitignore is now aware of build and runtime remnants for OpenCL
* improved detection of AMD Southern Island devices (for non-vectorization)
* xxd build dependency replaced with perl dependency

Developed by MulticoreWare with support from AMD and Telestream
x86-64: cabac_block_residual assembly

RDO: ~20% faster than C
Bitstream: ~50% faster than C
1-2% faster overall, highest on preset superfast/fast/medium.
x86inc: fix AVX emulation of cmp(p|s)(s|d)
x86inc: create xm# and ym#, analagous to m#

For when we want to mix simd sizes within one function.
x86: more AVX2 framework, AVX2 functions, plus some existing asm tweaks

AVX2 functions:
mc_chroma
intra_sad_x3_16x16
last64
ads
hpel
dct4
idct4
sub16x16_dct8
quant_4x4x4
quant_4x4
quant_4x4_dc
quant_8x8
SAD_X3/X4
SATD
var
SSD
zigzag interleave
weightp
weightb
intra_sad_8x8_x9
decimate
integral
hadamard_ac
sa8d_satd
sa8d
lowres_init
denoise
x86util: Support ymm registers in HADD macros
x86: AVX2 high bit-depth predict_8x8c_h/predict_8x16c_h
x86: AVX2 high bit-depth predict_16x16_h
x86: AVX2 high bit-depth predict_4x4_h
x86: AVX high bit-depth predict_16x16_v

Also restructure some code to reduce code size of various functions,
especially in high bit-depth.
x86: AVX2 predict_16x16_p

Also fix the AVX implementation to correctly use the SSSE3 inline asm instead
of SSE2.
x86: AVX2 predict_8x8c_p/predict_8x16c_p
x86: AVX2 predict_16x16_dc
x86: AVX memzero_aligned
x86: AVX2 nal_escape

Also rewrite the entire function to be faster and drop the AVX version which is no longer useful.
x86: AVX2 high_bit_depth pixel_avg2, get_ref, mc_copy_w16, mc_luma

Also reduce the number of xmm registers used by mc_copy_* to avoid
saving and restoring xmm6 and xmm7 on 64-bit Windows.
x86: AVX2 high bit-depth pixel_sad

Also use loops instead of duplicating code; reduces code size by ~10kB with
negligible effect on performance.
x86: AVX2 high bit-depth vsad
x86: AVX2 high bit-depth pixel_sad_x3/pixel_sad_x4

Also reduce the number of xmm registers used by sse2/ssse3 pixel_sad_x3.
x86: AVX2 high bit-depth pixel_ssd