msm: mpm-of: Remove explicit freeing managed resources

The platform model takes care of free'ing managed resources when probe
fails. Remove explicit calls to free managed resources. This will ensure
that all mananged resources are handled correclty by the platform
device framework.

Change-Id: I6062b1dab55c468ee224f0ca7c8e47631a1ff3c7
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: cpufreq: Ensure cpufreq change happens on corresponding CPU

Checking the cpus_allowed mask of the current thread before changing the
frequency doesn't guarantee that the rest of the execution will continue on
the same CPU. The only way to guarantee this is to schedule a work on the
specific CPU and also prevent hotplug  of that CPU (already done by
existing code).

Change-Id: I51a02fcc777a47d3c16f2d83c47e96f2c59f7ae6
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
msm: Add support for multiple memory holes

If a target supports multiple memory holes, the base address and
size of the memory holes are represented as an array of tuples.
The device tree is scanned in order to extract these values and
remove the memory.

Change-Id: Id253112a384b7f64be067636e5bffc69e3950fb5
Signed-off-by: Neeti Desai <neetid@codeaurora.org>
msm: clock-debug: Update fmax_rates to print uV/uA values for each level

Example output after change:
/sys/kernel/debug/clk/a7sspll $ cat fmax_rates
                  reg 0     reg 1
         freq        uV        uV
            0         0         1
   1000000000   1800000         4
 [ 1900000000   1800000         5]
            0   1800000         7

Change-Id: I1563cd8f77d479e0c6c67ee3c93a66fbafb6d6f7
Signed-off-by: Xiaogang Cui <xiaogang@codeaurora.org>
msm: restart: Add support for emergency download mode.

We now support a mechanism to put the device into emergency
download mode. Running 'reboot edl' will reset the device into
edl mode.

Change-Id: I8b966aeab1f7ceee9ea7e5e652a0145f38c14ea9
Signed-off-by: Ameya Thakur <ameyat@codeaurora.org>
arm: ftrace: ftrace_modify_code should make kernel text writable for update

STRICT_MEMORY_RWX write-protects the kernel text section, hence with
STRICT_MEMORY_RWX enabled ftrace need to make kernel text section
temporarily writable.

Change-Id: I67fef0ee1d81dd259bae623d7bf0ea2760ae7284
Signed-off-by: mohamed.khadri <mohamed.khadri@lge.com>
msm: kgsl: GDHS of GPU power rail while the screen is on

Workaround for b/9663109 until its root-caused

Signed-off-by: Ajay Dudani <adudani@codeaurora.org>
msm: restart: always do warm reset when reboot

memory contents must be maintained for reboot reason.

Change-Id: I21dd4d8702320391df68a26489c4e708607a540f
Signed-off-by: Devin Kim <dojip.kim@lge.com>
msm: mdss: Add support for disable load for hdmi vregs

Changes are to support additional disable load vreg
parameter for hdmi bindings

Change-Id: Ie3d9062f52e767cd97dae987053e9171c42a2808
Signed-off-by: Arpita Banerjee <cabane@codeaurora.org>
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
msm: Make CONFIG_STRICT_MEMORY_RWX even stricter

If CONFIG_STRICT_MEMORY_RWX was set, the first section (containing
the kernel page table and the initial code) and the section
containing the init code were both given RWX permission, which is
a potential security hole.

Pad the first section after the initial code (which will never
be executed when the MMU is on) to make the rest of the kernel
text start in the second section and make the first section RW.

Move some data which had ended up in the "init text"
section into the "init data" one, as this is RW, not RX.
Make the "init text" RX.

We will not free the section containing the "init text",
because if we do, the kernel will allocate memory for RW data there.

Change-Id: I6ca5f4e07342c374246f04a3fee18042fd47c33b
CRs-fixed: 513919
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
Signed-off-by: Patrick Tjin <pattjin@google.com>
msm: krait-regulator: switch mode on the same cpu

The driver currently runs LDO-BHS mode switches while possibly
running on a different CPU. The CPU for which the mode switch is
issued could be running its SPM sequence as a part of going in or
coming out of power collapse. The LDO-BHS switching executed from a
different CPU could race with the mode switches done in SPM sequence
leaving the CPU in a bad state.

Fix this by executing LDO-BHS mode switches on the target CPU. This
guarantees that the SPM sequence won't be running on that CPU while
changing modes.

CRs-Fixed: 523449
Change-Id: I863ce3bcd6dd9ba3155c4573071f01e7a020ef48
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Patrick Tjin <pattjin@google.com>
msm: krait-regulator: rename online to reg_en

The online variable is confusing, since it does not mean whether
the core is online or offline. It actually used to indicate whether
the regulator is enabled or disabled.
Change the variable name to indicate so.

Change-Id: I20c270162df57cf81c17e808d383880b5b2e4eef
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Patrick Tjin <pattjin@google.com>
msm: krait-regulator: fix race conditions in regulator enable/disable

The driver suffers from the following race conditions:
* when a core is being onlined and is in its PREPARE_UP stage regulator
enable for that core is called. This call may cause a switch between
ldo-bhs but since the core if not online yet and ldo-bhs calls are
strictly executed on the target cpu - this leads to smp function calls
to fail.
* before the core in onlined and after the PREPARE_UP stage there could
be another frequency change that causes a gang voltage change that in turn
causes this core to switch states. This too leads to failed smp function
calls since they are targeted towards offline core
* when a cpu is offlined but a DEAD notification is not sent a frequency
change on another core may cause a switch on this cpu. This also leads
to failed smp function calls on offline core.

Fix the above by forcing the core to BHS when it is in its transitory
phase and while it is offlined. In other words a core will switch to
bhs/ldo based on the voltage requests only between CPU_ONLINE and
CPU_DOWN_PREPARE notifications. A core can run on BHS if it
can run on LDO since LDO just acts as a voltage step down, the core
can run when fed higher voltage from BHS.

To do this add hooks to get cpu hotplug notifications in the driver and
appropriately force bhs or switch to ldo or bhs based on gang voltage.

CRs-Fixed: 529593
Change-Id: I7210f62072853ed6f807df2d78bc2144f67eaf31
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Patrick Tjin <pattjin@google.com>
msm: rpm_rbcpr_stats_v2: Support to query RBCPR stats

Support to query stats pertaining to RBCPR (Rapid Bridge Core Power
Reduction) from RPM data memory. The RBCPR module on the RPM modifies
voltage levels for certain chip level voltage rails based on feedback from
different sensors. This change allows querying for the RBCPR stats
maintained on RPM's data memory.

Change-Id: Ia3bdf1ef39c4064b2c3d7406b219e95c18ced21d
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
ARM: dts: msm: Add RBCPR stats node for msm8974

Add a device node to allow reading RBCPR (Rapid Bridge core power
reduction) related stats from RPM message RAM.

Change-Id: Ib39e8217c730bf89dffa6ae9b2779fb9e163b5a7
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
msm: audio: qdsp6v2:  Check return code from audio_aio_open()

When audio_aio_open() is triggered in blocking fashion, it  frees audio
resouces and returns error code. In the current implementation,  callers
did not check the error code which can lead to dereference to freed
resources and cause system crash.  Update the callers to check return
code and then return error back to application to avoid the issue. In
the meanwhile, update the audio_aio_open not to free memory for caller
and leave the caller to free the memory in error condition.

CRs-fixed: 436653
Change-Id: If4dda158cb988c5837517817b1afa0572c30696e
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
msm: mpm-of: Bug fixes.

When traversing the hlist, the driver incorrectly checks for NULL of
list node instead of the loop cursor to return an mpm pin mapping. Fix
by checking the NULL value of the loop cursor before return the MPM pin
mapping.

Also, when the pin corresponds to a bypassed interrupt, there could
potentially be a out of bounds access on the msm_mpm_irqs_m2a array. Fix
by adding a check for Bypass interrupt value before updating the array
with a linux irq mapping.

Change-Id: Ie6bc201a443d1d038f3680af1cc64f5b32fb47a4
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: clock-local2: Increase settling delays for CLKFLAG_RETAIN_*

8974v2.2, Pro, and future devices add small hardware delays between
powering on individual memory banks in an effort to minimize voltage
droops. Consequently, the memories will take slightly longer to enable
(200ns to 400ns, depending on the chip) than on earlier hardware.

Replace the current delay (achieved with dummy register accesses)
with an explicit 1us delay to support the newer chips.

Change-Id: Ib69812a50edf3f700e802057034f85a1bbcef43f
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-8974: Modify L2 table for 8974

Currently 1.26 GHz and 1.49 GHz in the L2 tables for 8974
map to 800 MHz DDR. With this change the above frequencies
now get mapped to 614 MHz DDR. This change maps the above
two frequencies to lower DDR and will thereby help save power
for use cases which spend majority of time at above frequencies.

Change-Id: I7f1cbc12ff7dae28f65863d5c41e68de2db40bfe
Signed-off-by: Dilip Gudlur <dgudlur@codeaurora.org>
msm: gdsc: Correct ordering of logic and memory collapse

To avoid leaking current from the MX rail, FORCE_MEM_PERIPH
should not be set unless the corresponding GDSC is enabled.
Update the order of operations to ensure this is requirement
is respected.

Change-Id: I257c5b17392579fca4a765d0facdd97a8a526ac5
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>