misc
update .gitignore

Signed-off-by: Andre Saddler <dresadd09691@gmail.com>
initial 4.8.x support
Variant fixes

-- canada support

various build fixes
fix devicetree binary path for supported g2 variants
BS: Variant Build Script

thanks to @WhatHub for the source

Signed-off-by: Andre Saddler <dresadd09691@gmail.com>
AOSPA ramdisk

Signed-off-by: Andre Saddler <dresadd09691@gmail.com>

ramdisk: res/images/charger: missing pngs

Signed-off-by: Andre Saddler <dresadd09691@gmail.com>
ramdisk: g2: update fstab

Signed-off-by: houstonn <houstonn@gmail.com>
scripts: remove localversion "+" from kernel version strings

Signed-off-by: faux123 <reioux@gmail.com>
use of swp{b} is deprecated for ARMv6+
ARM: 7668/1: fix memset-related crashes caused by recent GCC (4.7.2) optimizations

Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.

For instance in the following function:

void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
	memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
	waiter->magic = waiter;
	INIT_LIST_HEAD(&waiter->list);
}

compiled as:

800554d0 <debug_mutex_lock_common>:
800554d0:       e92d4008        push    {r3, lr}
800554d4:       e1a00001        mov     r0, r1
800554d8:       e3a02010        mov     r2, #16 ; 0x10
800554dc:       e3a01011        mov     r1, #17 ; 0x11
800554e0:       eb04426e        bl      80165ea0 <memset>
800554e4:       e1a03000        mov     r3, r0
800554e8:       e583000c        str     r0, [r3, #12]
800554ec:       e5830000        str     r0, [r3]
800554f0:       e5830004        str     r0, [r3, #4]
800554f4:       e8bd8008        pop     {r3, pc}

GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.

This patch fixes the return value of the assembly version of memset.
It adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:

Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).

Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:

save r8:
-       str     lr, [sp, #-4]!
+       stmfd   sp!, {r8, lr}

and restore r8 on both exit paths:
-       ldmeqfd sp!, {pc}               @ Now <64 bytes to go.
+       ldmeqfd sp!, {r8, pc}           @ Now <64 bytes to go.
(...)
        tst     r2, #16
        stmneia ip!, {r1, r3, r8, lr}
-       ldr     lr, [sp], #4
+       ldmfd   sp!, {r8, lr}

Step 3
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:

save r8:
-       stmfd   sp!, {r4-r7, lr}
+       stmfd   sp!, {r4-r8, lr}

and restore r8 on both exit paths:
        bgt     3b
-       ldmeqfd sp!, {r4-r7, pc}
+       ldmeqfd sp!, {r4-r8, pc}
(...)
        tst     r2, #16
        stmneia ip!, {r4-r7}
-       ldmfd   sp!, {r4-r7, lr}
+       ldmfd   sp!, {r4-r8, lr}

Step 4
======
Rewrite register list "r4-r7, r8" as "r4-r8".

Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7670/1: fix the memset fix

Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
with the memset return value.  However the memset itself became broken
by that patch for misaligned pointers.

This fixes the above by branching over the entry code from the
misaligned fixup code to avoid reloading the original pointer.

Also, because the function entry alignment is wrong in the Thumb mode
compilation, that fixup code is moved to the end.

While at it, the entry instructions are slightly reworked to help dual
issue pipelines.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
PM / Sleep: Add wake lock api wrapper on top of wakeup sources

Change-Id: Icaad02fe1e8856fdc2e4215f380594a5dde8e002
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Powersuspend

kernel/power/powersuspend: default to userspace for now

Signed-off-by: Paul Reioux <reioux@gmail.com>
kernel/power/powersuspend: add back userpace control w/ default kernel control

make kernel / userspace mode switchable

Signed-off-by: Paul Reioux <reioux@gmail.com>
kernel/power/powersuspend: remove userspace dependency from powersuspend

make powersuspend not depend on a userspace initiator anymore, but use a hook
in autosleep instead.

Signed-off-by: Paul Reioux <reioux@gmail.com>
powersuspend: new PM kernel driver for Android w/o early_suspend

Android early_suspend/late_resume PM kernel driver framework has been
deprecated by Google. This new powersuspend PM kernel driver is a replacement
for it and existing early_suspend drivers can be easily adapted to use this
new replacement driver

Signed-off-by: Paul Reioux <reioux@gmail.com>

powersuspend: fix logci derps :p

Signed-off-by: Paul Reioux <reioux@gmail.com>
vidc: move platform resource parsing out of v4l2

Keep v4l2 code cleaner by moving parsing logic to separate file.

Change-Id: I65999400ad4391caa396a2bdcc8494db1727bed9
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Signed-off-by: Eric Ho <yinlokh@codeaurora.org>
msm: vidc: Add support for Constrained High Profile

This commit allows encoder clients to choose Constrained High
profile when encoding.

Change-Id: I0860367022bcdfab7d1a410b985f1a95fc6361cc
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
msm: vidc: add check for supported video session

Check if video session load can be handled by f/w
after session_init_done state and before moving to
load_resources state. This will ensure fallback of
unsupported video session to software codec library.

Change-Id: Ib8856a519a23c8bcab951c0e014dc5f454859efe
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
msm: vidc: Fix for fuzz issues in firmware

Firmware is reporting session error for etb/ftb
due to incorrect packet sizes being sent. Fix this
by modifying the size of zero lenth array elements
in etb/ftb packets to one.

Change-Id: I2127290b9bd7f62e524d19f2fee42691d26e6d0a
Signed-off-by: Rajeshwar Kurapaty <rkurapat@codeaurora.org>
ASoC: msm: Avoid multiple release of ocmem memory

Add check to avoid multiple release of same OCMEM buffer,
by checking if the buffer is already freed before. This
is to avoid any system crash due to multiple release of
same buffer.

Change-Id: I527b1e9d502538818d2a15a614b693611c3a6cd9
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
msm: ocmem: Handle shrinking of memory after passive evictions

During a passive eviction, the information of the client
which triggered the eviction is not stored in the request
structure of the evicted client. This is needed during the
shrink operation of the evicted client.

Store the eviction data of the request being evicted in the
request structure to handle the shrink operation.

Change-Id: Ie03573d0c488801a6e436babccf6b84bd777fb3e
Signed-off-by: Neeti Desai <neetid@codeaurora.org>
gpu: ion: Secure buffers at allocation time

Currently, buffers allocated as secure must be explicitly secured
with a lock call. Considering all buffers from secured heaps are now
always secured and will never be mapped in the non-secure world,
this extra lock call is redundant. Lock the buffer at allocation
time instead of requiring clients to do so explicitly. Reference
counting will ensure correctness until clients remove the lock/unlock
calls.

Change-Id: I1593b6ec651b13b22171997606c915b8f51a05fd
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
gpu: ion: Don't flush secure buffers

Secure buffers have very tight restrictions about mapping into
the non secure world. The buffers are always allocated as uncached
such that there should never be a reason to have a CPU side
non-secure mapping once the buffer is allocated. Some clients may
share the same code path for secure and non-secure transactions.
Unfortunately these clients either cannot or will not distiguish
between secure and non-secure buffers, meaning they will unconditionally
try to flush the buffers. This may lead to bad things. Until clients
manage to properly distinguish between secure and non-secure buffers,
add a check in the cache flushing code to not flush if the buffer is
secure.

Change-Id: Idb0d791a8b74367e0ce0b533f980caedc23044b3
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>