R600/SI: Fix extra defs of VCC / SCC.

When replacing scalar operations with vector,
the wrong implicit output register was used.
R600/SI: Move patterns to match add / sub to scalar instructions
R600/SI: Specify S_ADD/S_SUB set SCC and add is commutable
R600/SI: Match adde/sube to S_ADDC_U32/S_SUBB_U32
R600/SI: Match addc to S_ADD_U32.

The carry always goes to SCC.
R600/SI: addc / adde i32 are legal
R600/SI: Specify SSrc operands
R600/SI: Implement add i64, but do not yet enable.

Test doesn't actually check the output. I need
to fix add i64 being matched for the addressing
calculations.
R600/SI: Fix multiple SGPR reads when using VCC.

No other SGPR operands are allowed, so if VCC is
used, move the other to a VGPR.
R600/SI: Fix moveToVALU when the first operand is VSrc.

Moving into a VSrc doesn't always work, since it could be
replaced with an SGPR later.