Add hadSideEffects=0 to some instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189779 91177308-0d34-0410-b5e6-96231b3b80d8
[Sparc] Add support for soft long double (fp128).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189780 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] Added IntrNoMem to the floating-point intrinsics.

This changes the SelectionDAG nodes from ISD::INTRINSIC_W_CHAIN to
ISD::INTRINSIC_WO_CHAIN which enables easy lowering to equivalent SelectionDAG
nodes (e.g. __builtin_msa_fadd_w -> ISD::FADD) in future patches since nodes
such as ISD::FADD do not have a chain.

As per a similar change in r189106
(http://llvm.org/viewvc/llvm-project?rev=189106&view=rev) there isn’t a new
testcase in this patch since the existing tests should test the intrinsics to
the same standard and the best I can do for a testcase would be a fragile
pass/maybe test of whether memory operations can (and do) cross the intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189782 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][msa] Added IntrNoMem and removed Commutative from sub intrinsics.

This changes the SelectionDAG nodes from ISD::INTRINSIC_W_CHAIN to
ISD::INTRINSIC_WO_CHAIN which enables easy lowering to equivalent SelectionDAG
nodes (e.g. __builtin_msa_sub_w -> ISD::SUB) in future patches since nodes
such as ISD::SUB do not have a chain.
It also corrects an obvious mistake, namely that the subtract intrinsics were
marked as being commutative.

As per a similar change in r189106
(http://llvm.org/viewvc/llvm-project?rev=189106&view=rev) there isn’t a new
testcase in this patch since the existing tests should test the intrinsics to
the same standard and the best I can do for a testcase would be a fragile
pass/maybe test of whether memory operations can (and do) cross the intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189784 91177308-0d34-0410-b5e6-96231b3b80d8
[msan] Fix select instrumentation.

Select condition shadow was being ignored resulting in false negatives.
This change OR-s sign-extended condition shadow into the result shadow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189785 91177308-0d34-0410-b5e6-96231b3b80d8
[msan] Fix handling of select with struct arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189796 91177308-0d34-0410-b5e6-96231b3b80d8
[MC] AvailableFeatures needs to be a uint64_t to match FeatureBits in MCSubtargetInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189815 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Add support for TMHH, TMHL, TMLH and TMLL

For now this just handles simple comparisons of an ANDed value with zero.
The CC value provides enough information to do any comparison for a
2-bit mask, and some nonzero comparisons with more populated masks,
but that's all future work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189819 91177308-0d34-0410-b5e6-96231b3b80d8
Migrate the DWARF_VERSION constant to 4. It largely needs to go away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189824 91177308-0d34-0410-b5e6-96231b3b80d8
[MC] Revert part of my previous change, I was a bit overzealous.

A change to test the previous commit will be coming soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189825 91177308-0d34-0410-b5e6-96231b3b80d8
Print string value for DT_RPATH and DT_RUNPATH.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189829 91177308-0d34-0410-b5e6-96231b3b80d8
In this patch we are trying to do two things:
1) If the width of vectorization list candidate is bigger than vector reg width, we will break it down to fit the vector reg.
2) We do not vectorize the width which is not power of two.

The performance result shows it will help some spec benchmarks. mesa improved 6.97% and ammp improved 1.54%. 

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189830 91177308-0d34-0410-b5e6-96231b3b80d8
TableGen: Enumerate Schedule Model too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189839 91177308-0d34-0410-b5e6-96231b3b80d8
Add the rest of the stock attributes to the attribute table.

This won't affect the kinds of hashes we test for as we actually
do hashing based on form and attribute. Change the fission-hash
testcase one last time to handle DW_AT_comp_dir.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189840 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "Revert "ARM: Improve pattern for isel mul of vector by scalar.""

This reverts commit r189648.

Fixes for the previously failing clang-side arm_neon_intrinsics test
cases will be checked in separately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189841 91177308-0d34-0410-b5e6-96231b3b80d8
Add a Python-like join function to merge a list of strings with a
separator between each two elements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189846 91177308-0d34-0410-b5e6-96231b3b80d8
Alphabetize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189848 91177308-0d34-0410-b5e6-96231b3b80d8
WIP: Refactor some code so that it can be called by more than just one method. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189849 91177308-0d34-0410-b5e6-96231b3b80d8
Use type form of getIntPtrType in alloca visitor.

This doesn't actually matter, since alloca is always
0 address space, but this is more consistent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189853 91177308-0d34-0410-b5e6-96231b3b80d8
Teach InstCombineLoadCast about address spaces.

This is another one that doesn't matter much,
but uses the right GEP index types in the first
place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189854 91177308-0d34-0410-b5e6-96231b3b80d8