Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.

There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.

The refactoring was OK'd by Anton Korobeynikov on llvmdev.

Note: this touches the target interfaces, so out-of-tree targets may
be affected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
Clear the whole table including the tombstones, since the tombstone count will
be set to zero that is what it was intended. Should improve performance of 
the data structure when clear is invoked frequently (both compile time and
memory usage).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175799 91177308-0d34-0410-b5e6-96231b3b80d8
Remove dead code and whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175804 91177308-0d34-0410-b5e6-96231b3b80d8
Re-apply r175688, with the changes suggested by Jakob in PR15320.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175809 91177308-0d34-0410-b5e6-96231b3b80d8
Allow GlobalValues to vectorize with AliasAnalysis

Storing the load/store instructions with the values
and inspect them using Alias Analysis to make sure
they don't alias, since the GEP pointer operand doesn't
take the offset into account.

Trying hard to not add any extra cost to loads and stores
that don't overlap on global values, AA is *only* calculated
if all of the previous attempts failed.

Using biggest vector register size as the stride for the
vectorization access, as we're being conservative and
the cost model (which calculates the real vectorization
factor) is only run after the legalization phase.

We might re-think this relationship in the future, but
for now, I'd rather be safe than sorry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175818 91177308-0d34-0410-b5e6-96231b3b80d8
Limit cast machinery to preserve const and not accept temporaries

After cleaning up the following type hierarchies:
  * TypeLoc: r175462
  * SVal: r175594
  * CFGElement: r175462
  * ProgramPoint: r175812
that all invoked undefined behavior by causing a derived copy construction of a
base object through an invalid cast (thus supporting code that relied on
casting temporaries that were direct base objects) Clang/LLVM is now clean of
casts of temporaries. So here's some fun SFINAE machinery (courtesy of Eli
Friedman, with some porting back from C++11 to LLVM's traits by me) to cause
compile-time failures if llvm::cast & friends are ever passed an rvalue.

This should avoid a repeat of anything even remotely like PR14321/r168124.

Thanks to Jordan Rose for the help with the various Static Analyzer related
hierarchies that needed cleaning up, Eli for the SFINAE, Richard Smith, John
McCall, Ted Kremenek, and Anna Zaks for their input/reviews/patience along the
way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175819 91177308-0d34-0410-b5e6-96231b3b80d8
Previously, parsing capability of the .debug_frame section was added
to lib/DebugInfo, with dumping in llvm-dwarfdump. This patch adds
initial ability to parse and dump CFA instructions contained in
entries.

To keep it manageable, the patch omits some more advanced capabilities
(accounted in TODOs):

* Parsing of instructions with BLOCK arguments (expression lists)
* Dumping of actual instruction arguments (currently only names are
dumped). This is quite tricky since the dumper has to effectively
"interpret" the instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175820 91177308-0d34-0410-b5e6-96231b3b80d8
Stop relying on physical register kill flags in isKilled() in the two-address
pass. One of the callers of isKilled() can cope with overapproximation of kills
and the other can't, so I added a flag to indicate this.

In theory this could pessimize code slightly, but in practice most physical
register uses are kills, and most important kills of physical registers are the
only uses of that register prior to register allocation, so we can recognize
them as kills even without kill flags.

This is relevant because LiveIntervals gets rid of all kill flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175821 91177308-0d34-0410-b5e6-96231b3b80d8
Implement the NoBuiltin attribute.

The 'nobuiltin' attribute is applied to call sites to indicate that LLVM should
not treat the callee function as a built-in function. I.e., it shouldn't try to
replace that function with different code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175835 91177308-0d34-0410-b5e6-96231b3b80d8
Add a bitmask for NoBuiltin. This should *not* be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175843 91177308-0d34-0410-b5e6-96231b3b80d8
Remove warning about default covering no cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175846 91177308-0d34-0410-b5e6-96231b3b80d8
Code cleanup: pass Offset by pointer to parseInstruction to more explicitly
convey that it's a INOUT argument.
Also, if parsing of entry instructions fails, don't push the entry.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175847 91177308-0d34-0410-b5e6-96231b3b80d8
Remove code copied from GenRegisterInfo.inc.

There's no apparent reason this code was copied from generated source
into a .cpp. It sets a bad example for those working on other targets
and trying to understand the register info API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175849 91177308-0d34-0410-b5e6-96231b3b80d8
Fix isa<> check which could never be true.

It was incorrectly checking a Function* being an IntrinsicInst* which
isn't possible.  It should always have been checking the CallInst* instead.

Added test case for x86 which ensures we only get one constant load.
It was 2 before this change.

rdar://problem/13267920

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175853 91177308-0d34-0410-b5e6-96231b3b80d8
Expand mips16 SelT form pseudso/macros.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175862 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a nomenclature mistake. Slt->Slti in the functions. The "i" refers
to the immediate operand of sli or cmp function.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175865 91177308-0d34-0410-b5e6-96231b3b80d8
Use references to attribute groups on the call/invoke instructions.

Listing all of the attributes for the callee of a call/invoke instruction is way
too much and makes the IR unreadable. Use references to attributes instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175877 91177308-0d34-0410-b5e6-96231b3b80d8
Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.

The Printer will now print instructions with the correct alignment specifier syntax, like
    vld1.8  {d16}, [r0:64]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add pattern for fceil.

9 more little piglits with radeonsi.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175885 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add pattern for logical or of i1 values.

24 more little piglits with radeonsi.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175886 91177308-0d34-0410-b5e6-96231b3b80d8