Align lz4_cache allocations

The original LZ4 source code suggests that that the hash table is
intended to fit entirely into the L1 data cache on Intel processors, but
the code makes no attempt to align its allocations to cache lines. This
is a bug in the original LZ4 code that should be corrected.

SLAB allocators normally pack objects consecutively in virtual
allocations that are page aligned. The effect is that allocations that
are powers of two are always aligned to a cacheline. The SPL SLAB
allocator implementation interleaves objects with their metadata, which
requires us to explicitly force cacheline alignment.

We correct this by explicitly forcing 64-byte alignment. This will
guarentee proper alignment on Intel processors, as well as many others.
LZ4 operations appeared in `perf top -U` as about 1% of total CPU time
on my system prior to this change. It no longer appears on the list.

Signed-off-by: Richard Yao <ryao@cs.stonybrook.edu>