msm-3.4: acpuclock: Add 8064v2 PVS voltage table data

Add PVS tables for 8064v2 speed bin 2 (2GHz).

Change-Id: Iceffba9d0718f263de6e0fb32a89ca7878ad8310
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8064: Final PVS Table Data for 8064v2

Update data from preliminary values to final data.

Change-Id: I69f32ef1bc1a82f8a93c1d465e55116e2a718013
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8064: Add support for 8064v1.1 FASTER PVS bin

Add updated PVS data.

Change-Id: I011241d3ea3943673a888cd0aeca925440500ff2
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8064: Add PVS tables for 1.7 GHz parts

Add all seven PVS bins.

(cherry picked from commit a2a4366a5a438a70a11a48555a5f3b8d3d5e6b29)

Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit ccdbad5f5d87c5b11c7e675f1e6e62e2a14654a6)

Change-Id: Ib05baeeb0939fe5ba69a8b77806c757b08b5aa32
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
msm: acpuclock-8064: Update L2 voltage table

Characterization data shows that L2 runs up to 667MHz with vdd_cx at 1.05v.
Therefore, update the L2 voltage table to match the new data.

In addition, update acpuclock table to use the updated max L2 frequency
with vdd_cx at 1.05v.

(cherry picked from commit 222732641a6b3a7eb81244c994c7d88435bedb45)

Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
(cherry picked from commit e68235ae2224ba6aded7295e4d58157dc7f0b759)

Change-Id: I55b50e32eaf69f87d6bd460ea1118224228a6774
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>