OMAP: PM: move dpll2_ck lookup out of omap_pm_dsp_get_opp()

This fixes the following:

WARNING: at /usr/local/src/android/system/kernel/samsung/latona/kernel/mutex.c:198 __mutex_lock_slowpath+0x27c/0x28c()
Modules linked in: wl12xx_sdio wl12xx mac80211 cfg80211 compat
[<c00497f8>] (unwind_backtrace+0x0/0xf8) from [<c007db1c>] (warn_slowpath_common+0x4c/0x64)
[<c007db1c>] (warn_slowpath_common+0x4c/0x64) from [<c007db50>] (warn_slowpath_null+0x1c/0x24)
[<c007db50>] (warn_slowpath_null+0x1c/0x24) from [<c0573750>] (__mutex_lock_slowpath+0x27c/0x28c)
[<c0573750>] (__mutex_lock_slowpath+0x27c/0x28c) from [<c057376c>] (mutex_lock+0xc/0x24)
[<c057376c>] (mutex_lock+0xc/0x24) from [<c03e4fd8>] (clk_get_sys+0x1c/0xe0)
[<c03e4fd8>] (clk_get_sys+0x1c/0xe0) from [<c006efbc>] (omap_pm_dsp_get_opp+0x70/0xe4)
[<c006efbc>] (omap_pm_dsp_get_opp+0x70/0xe4) from [<c03cee34>] (sm_interrupt_dsp+0x7c/0x168)
[<c03cee34>] (sm_interrupt_dsp+0x7c/0x168) from [<c03caf9c>] (io_dpc+0x450/0x7a4)
[<c03caf9c>] (io_dpc+0x450/0x7a4) from [<c0083684>] (tasklet_action+0x6c/0x150)
[<c0083684>] (tasklet_action+0x6c/0x150) from [<c0084264>] (__do_softirq+0x9c/0x260)
[<c0084264>] (__do_softirq+0x9c/0x260) from [<c00844e0>] (run_ksoftirqd+0xb8/0x184)
[<c00844e0>] (run_ksoftirqd+0xb8/0x184) from [<c009bc7c>] (kthread+0x80/0x88)
[<c009bc7c>] (kthread+0x80/0x88) from [<c00455dc>] (kernel_thread_exit+0x0/0x8)
OMAP: PM: change DSP rate only when required

This should prevent the following to some extent:

WARNING: at /usr/local/src/android/system/kernel/samsung/latona/kernel/mutex.c:198 __mutex_lock_slowpath+0x27c/0x28c()
Modules linked in: wl12xx mac80211 cfg80211 compat [last unloaded: wl12xx_sdio]
[<c00497f8>] (unwind_backtrace+0x0/0xf8) from [<c007dae8>] (warn_slowpath_common+0x4c/0x64)
[<c007dae8>] (warn_slowpath_common+0x4c/0x64) from [<c007db1c>] (warn_slowpath_null+0x1c/0x24)
[<c007db1c>] (warn_slowpath_null+0x1c/0x24) from [<c0573710>] (__mutex_lock_slowpath+0x27c/0x28c)
[<c0573710>] (__mutex_lock_slowpath+0x27c/0x28c) from [<c057372c>] (mutex_lock+0xc/0x24)
[<c057372c>] (mutex_lock+0xc/0x24) from [<c005c6ec>] (omap_device_scale+0x44/0x6f0)
[<c005c6ec>] (omap_device_scale+0x44/0x6f0) from [<c03cee90>] (sm_interrupt_dsp+0x118/0x168)
[<c03cee90>] (sm_interrupt_dsp+0x118/0x168) from [<c03cb0f4>] (io_dpc+0x5e8/0x7a4)
[<c03cb0f4>] (io_dpc+0x5e8/0x7a4) from [<c0083650>] (tasklet_action+0x6c/0x150)
[<c0083650>] (tasklet_action+0x6c/0x150) from [<c0084230>] (__do_softirq+0x9c/0x260)
[<c0084230>] (__do_softirq+0x9c/0x260) from [<c00844ac>] (run_ksoftirqd+0xb8/0x184)
[<c00844ac>] (run_ksoftirqd+0xb8/0x184) from [<c009bc48>] (kthread+0x80/0x88)
[<c009bc48>] (kthread+0x80/0x88) from [<c00455dc>] (kernel_thread_exit+0x0/0x8)
board-latona-display: remove OCP interconnect constraints

L3 OPP1 is disabled, there's no need to specify constraints.
board-latona-display: code cleanup

Remove useless function, declare init_clk_disable as static and
fix code indentation.
gpu: pvr: allow to change SGX functional clock rate

Allow also to use corex2_fck as parent clock sgx_fck.
Using corex2_fck will allow to increase sgx_fck up to 266MHz.
gpu: pvr: allow to use corex2_fck as parent clock for sgx_fck
gpu: pvr: OMAP3: make ACTIVE_POWER_LATENCY a module param
gpu: pvr: define module params only when required
OMAP3: latona: clamp initial max CPU clock frequency to nominal

This prevents the system from using out-of-spec overclocking OPPs until
userspace explicitly enables them.
latona: code cleanup
Revert "drivers: omap-serial: hold wakelock when serial uart driver resumes"

This reverts commit 23881b334e8435eb97565c9ba28cab50d66c74e8.
Revert "board-latona: hold wake lock on WiLink awake"

This reverts commit e7d0efa86fbd3401f9dfafd6d4a1e48595bb441c.
Revert "board-latona: BT runtime PM adaptation"

This reverts commit f35f13937ae3654452296d2c60d0e6f127021f7a.
board: latona: hold a wakelock when WiLink chip is awake

The wakelock will be held 5 seconds max, which are enough to let
the userspace handle the serial UART RX data.
OMAP2+: cpufreq: support clamping initial max frequency to board-provided value

This is useful to allow boards to define "overclocking" OPPs without
having them be automatically enabled when the cpufreq driver loads.

Change-Id: I29d94981d3827280d8b1bc4cd11dc60f8de14db7
Staging: TIDSPBRIDGE: Use vm_iomap_memory for mmap-ing instead of remap_pfn_range

This fixes the following bug:

----  Bug Report ----

source file: drivers/staging/tidspbridge/rmgr/drv_interface.c
issue      : mapping of physical memory without address range checks

259 static int bridge_mmap(struct file *filp, struct vm_area_struct *vma)
260 {
261         u32 status;
262
263         /* VM_IO | VM_DONTEXPAND | VM_DONTDUMP are set by remap_pfn_range() */
264         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
265
266         dev_dbg(bridge, "%s: vm filp %p start %lx end %lx page_prot %ulx "
267                 "flags %lx\n", __func__, filp,
268                 vma->vm_start, vma->vm_end, vma->vm_page_prot,
269                 vma->vm_flags);
270
271         status = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
272                                  vma->vm_end - vma->vm_start,
273                                  vma->vm_page_prot);
274         if (status != 0)
275                 status = -EAGAIN;
276
277         return status;
278 }

The function provides an interface to remap physical memory to user space, but
does not provide any checks to ensure that the memory is within the region that
should be accessible.

Reported-by: Nico Golde <nico@ngolde.de>
Reported-by: Fabian Yamaguchi <fabs@goesec.de>

Signed-off-by: Ivaylo Dimitrov <freemangordon@abv.bg>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
[steven@steven676.net: make apply to omapzoom p-android-omap3-3.0 branch]

Change-Id: Ie8bb7d62efc5fd5b8f314c229df55c633550dec0
Merge branch 'cm-11.0' of git://github.com/dhiru1602/android_kernel_samsung_latona into cm-11.0
Merge branch 'cm-11.0' into latona-3.0.y