Build after project rename
Add symbols
Base project name on mbed project name
Base DS-5 lpc11u24 project name on mbed project name
CMSIS KL46 files (were KL25 renamed)
Added new serial class, remove interrupt chaining

The new RawSerial class is a simple wrapper over the serial HAL that can
be safely used from an interrupt handler.
Interrupt chaining code was removed from InterruptIn, Serial and Ticker
because it caused lots of issues with the RTOS. Interrupt chaining is
still possible using the InterruptManager class.
Fix error in 'update_repo' call
Added the new RawSerial.h in mbed.h
Updated package name
Merge branch 'master' into feature/pypi
Merge pull request #92 from parisk/feature/pypi

Feature/pypi updates [package name, synced with upstream master]
Disable DEVICE_STDIO_MESSAGES for LPC81X

Because the LPC81X HAL implementation calls error(), which in turn calls
fprintf(), quite a bit of code is added to the image, which is not a good
idea on such resource constrained targets.
Fix relocation of vector on STM32.
Merge branch 'master' of git://github.com/mbedmicro/mbed into bugfix-STM32-vectors
serial_putc() to make better use of Tx FIFO

If don't know if this is an issue that anyone cares about.  I am also
not sure what the best way to solve it is either.  I just thought I
would issue a pull request with this commit to bring the issue to light
and show a possible solution that I have tested on my mbed-1768 device.

Previously the serial_putc() API didn't make any use of the Tx FIFO
since the serial_writable() API it utilizes only returns true when the
FIFO is completely empty.  This is due to the fact that the THRE bit of
the UART's LSR (Line Status Register) only goes high when the whole
FIFO is empty.

I noticed this when doing some performance testing with the network
stack.  I went from calling printf() to output 3 bytes every 10 seconds
(with packet drop stats) to instead output 4 bytes every 10 seconds.
I thought these should easily fit in the 16 byte FIFO but outputting
one extra byte caused an additional three 550 byte UDP packets to be
dropped.  This should only happen if the additional character being
sent to the UART was taking away extra CPU cycles from the network
stack.

My solution is to keep track of the number of bytes that have been
placed in the Tx FIFO since it was last detected as being completely
empty (via the THRE bit).  Only once this count hits 16 does the code
then block, waiting for the THRE bit to go high.  Each time the THRE
bit does go high, the count is reset to 0 again and it is incremented
for each byte that is loaded into the THR.
Merge pull request #93 from spectaclelabs/bugfix-STM32-vectors

Make STM32F4 vectors relocate properly
Merge remote-tracking branch 'github/master'
Merge pull request #91 from jorisa/master

Add CAN api filter support and LPC11CXX CAN implementation
fixed can_filter() prototype (prevents build of LPC1768)
Merge pull request #94 from pbrier/master

fixed can_filter() prototype (prevents build of LPC1768)