arm/crypto: Add optimized AES and SHA1 routines
Add assembler versions of AES and SHA1 for ARM platforms.  This has provided
up to a 50% improvement in IPsec/TCP throughout for tunnels using AES128/SHA1.

Platform   CPU SPeed    Endian   Before (bps)   After (bps)   Improvement

IXP425      533 MHz      big     11217042        15566294        ~38%
KS8695      166 MHz     little    3828549         5795373        ~51%

Signed-off-by: David McCullough <ucdevel@gmail.com>
ARM: net: JIT compiler for packet filters

based of Matt Evans's PPC64 implementation.

The compiler generates ARM instructions but interworking is
supported for Thumb2 kernels.

Supports both little and big endian. Unaligned loads are emitted
for ARMv6+. Not all the BPF opcodes that deal with ancillary data
are supported. The scratch memory of the filter lives on the stack.
Hardware integer division is used if it is available.

Enabled in the same way as for x86-64 and PPC64:

	echo 1 > /proc/sys/net/core/bpf_jit_enable

A value greater than 1 enables opcode output.

Signed-off-by: Mircea Gherzan <mgherzan@xxxxxxxxx>
---

Changes in v7:
 * fix the intruction generation for LDX_MSH, OR_X, LSH_K,
   RSH_K and JMP_JA
 * fix the condition for saving the A register
 * use fls() instead of the compiler builtin
 * punt to the interpreter on absolute loads with K < 0
 * check for invalid data references
 * support the NEG opcode
 * clear X in the prologue based on a context flag
 * simplify the conditional jumps

Changes in v6:
 * fix the code generation for the ANC_CPU opcode

Changes in v5:
 * replace SEEN_LEN with SEEN_SKB
 * set ctx->seen when handling some ancillary data opcodes

Changes in v4:
 * first check if the JIT compiler is enabled
 * fix the code generation for the LDX_MSH opcode

Changes in v3:
 * no longer depend on EABI and !Thumb2
 * add BLX "emulation" for ARMv4 without Thumb
 * use the integer divide instruction on Cortex-A15
 * fix the handling of the DIV_K opcode
 * use a C wrapper for __aeabi_uidiv
 * fix the generation of the epilogue (non-FP case)

Changes in v2:
 * enable the compiler only for ARMv5+ because of the BLX instruction
 * use the same comparison for the ARM version checks
 * use misaligned accesses on ARMv6
 * fix the SEEN_MEM
 * fix the mem_words_used()
BPF JIT Compiled build fix
Enable BPF Jit Compiler
mach-msm: mpdecision: don't turn off cpu1 if freq > idle

This fixes cpu1 being turned off though it is still working
with a high frequency. The idle_freq can be modified through sysfs.

Signed-off-by: showp1984 <showp1984@gmail.com>
mach-msm: mpdecision: fixup: move idle block to mpdecision()

This belongs in mp_decision() because this influences the decision
mpdecision is about to make.

Signed-off-by: showp1984 <showp1984@gmail.com>
mach-msm: mpdecision: don't turn on cpu1 if cpu0 freq is below idle_freq
If the clock of cpu0 is below the set idle_freq don't enable cpu1 and
disregard the runqueue value.

Signed-off-by: showp1984 <showp1984@gmail.com>
MPDecision cleanup
Make RNG read/write wakeup threshold configurable
mpdecision: modify idle_freq decision points to improve efficiency

In the idle case, the new_state assignment would happen twice. This moves both
assignments inside the decision so the assignment only happens once.
[patch] iosched: prevent aliased requests from starving other I/O

http://lkml.indiana.edu/hypermail/linux/kernel/1106.0/00548.html

Hi, Jens,

If you recall, I posted an RFC patch for this back in July of last year:
http://lkml.org/lkml/2010/7/13/279

The basic problem is that a process can issue a never-ending stream of
async direct I/Os to the same sector on a device, thus starving out
other I/O in the system (due to the way the alias handling works in both
cfq and deadline). The solution I proposed back then was to start
dispatching from the fifo after a certain number of aliases had been
dispatched. Vivek asked why we had to treat aliases differently at all,
and I never had a good answer. So, I put together a simple patch which
allows aliases to be added to the rb tree (it adds them to the right,
though that doesn't matter as the order isn't guaranteed anyway). I
think this is the preferred solution, as it doesn't break up time slices
in CFQ or batches in deadline. I've tested it, and it does solve the
starvation issue. Let me know what you think.

Cheers,
Jeff
cmdline_maxscroff: add initial cmdline parsing
cmdline_maxscroff: modify acpuclock to set our max scr off rate
cmdline_maxscroff: add earlysuspend/lateresume to cpufreq to determine if screen is on/off
cmdline_maxscroff: add debug messages
cmdline_maxscroff: cleanup earlysuspend/lateresume and ...
modify log messages to show the REAL current frequency, not the one that is about to be set.
cmdline_maxscroff: add sysfs interface
block: Adding ROW scheduling algorithm

Signed-off-by: Tatyana Brokhman <tlinder@xxxxxxxxxxxxxx>

Conflicts:
	block/Makefile

Conflicts:

	block/Makefile
row-iosched.c: Fix build errors
Error log :
block/row-iosched.c: In function ‘row_add_request’:
block/row-iosched.c:252:29: error: ‘struct request’ has no member named ‘elv’
block/row-iosched.c: In function ‘row_merged_requests’:
block/row-iosched.c:512:31: error: ‘struct request’ has no member named ‘elv’
block/row-iosched.c: In function ‘row_set_request’:
block/row-iosched.c:556:4: error: ‘struct request’ has no member named ‘elv’
Enable ROW; Disable & build fix VR