2013-05-22  Tobias Burnus  <burnus@net-b.de>

        PR fortran/57338
        * intrinsic.c (do_check): Move some checks to ...
        (do_ts29113_check): ... this new function.
        (check_specific, gfc_intrinsic_sub_interface): Call it.

2013-05-22  Tobias Burnus  <burnus@net-b.de>

        PR fortran/57338
        * gfortran.dg/assumed_type_6.f90: New.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199192 138bc75d-0d04-0410-961f-82ee72b054a4
2013-05-22  Richard Biener  <rguenther@suse.de>

	PR middle-end/57349
	* profile.c (branch_prob): Do not split blocks that are
	abnormally receiving from ECF_RETURNS_TWICE functions.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199193 138bc75d-0d04-0410-961f-82ee72b054a4
Fix several libffi testsuite failures on 64-bit SPARC and PowerPC (PR libffi/56033)

	PR libffi/56033
	* testsuite/libffi.call/cls_struct_va1.c (test_fn): Cast resp to
	ffi_arg *.
	* testsuite/libffi.call/cls_uint_va.c (cls_ret_T_fn): Likewise.
	* testsuite/libffi.call/va_1.c (main): Change res to ffi_arg.
	* testsuite/libffi.call/va_struct1.c (main): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199194 138bc75d-0d04-0410-961f-82ee72b054a4
2013-05-22  Tobias Burnus  <burnus@net-b.de>

        PR fortran/57364
        * resolve.c (get_temp_from_expr): Commit created sym.

2013-05-22  Tobias Burnus  <burnus@net-b.de>

        PR fortran/57364
        * gfortran.dg/defined_assignment_6.f90: New.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199196 138bc75d-0d04-0410-961f-82ee72b054a4
2013-05-22  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.h (MALLOC_ABI_ALIGNMENT): New #define.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199198 138bc75d-0d04-0410-961f-82ee72b054a4
2013-05-22  Matthias Klose  <doko@ubuntu.com>

        * jvspec.c (jvgenmain_spec): Add %I to cc1 call.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199199 138bc75d-0d04-0410-961f-82ee72b054a4
Fix PR target/57340 and additionally for PR target/19599. 

2013-05-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/19599
	PR target/57340
	* config/arm/arm.c (any_sibcall_uses_r3): Rename to ..
	(any_sibcall_could_use_r3): this and handle indirect calls.
	(arm_get_frame_offsets): Rename use of any_sibcall_uses_r3.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199203 138bc75d-0d04-0410-961f-82ee72b054a4
2013-05-22  Tobias Burnus  <burnus@net-b.de>

        * resolve.c (get_temp_from_expr): Fix temp var mangling.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199214 138bc75d-0d04-0410-961f-82ee72b054a4
2013-05-22  Tobias Burnus  <burnus@net-b.de>

        * resolve.c (get_temp_from_expr): Change mangling to
        start always with a _.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199215 138bc75d-0d04-0410-961f-82ee72b054a4
[gcc]
2013-05-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
	    Pat Haugen <pthaugen@us.ibm.com>
	    Peter Bergner <bergner@vnet.ibm.com>

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Add
	documentation for the power8 crypto builtins.

	* config/rs6000/t-rs6000 (MD_INCLUDES): Add crypto.md.

	* config/rs6000/rs6000-builtin.def (BU_P8V_AV_1): Add support
	macros for defining power8 builtin functions.
	(BU_P8V_AV_2): Likewise.
	(BU_P8V_AV_P): Likewise.
	(BU_P8V_VSX_1): Likewise.
	(BU_P8V_OVERLOAD_1): Likewise.
	(BU_P8V_OVERLOAD_2): Likewise.
	(BU_CRYPTO_1): Likewise.
	(BU_CRYPTO_2): Likewise.
	(BU_CRYPTO_3): Likewise.
	(BU_CRYPTO_OVERLOAD_1): Likewise.
	(BU_CRYPTO_OVERLOAD_2): Likewise.
	(XSCVSPDP): Fix typo, point to the correct instruction.
	(VCIPHER): Add power8 crypto builtins.
	(VCIPHERLAST): Likewise.
	(VNCIPHER): Likewise.
	(VNCIPHERLAST): Likewise.
	(VPMSUMB): Likewise.
	(VPMSUMH): Likewise.
	(VPMSUMW): Likewise.
	(VPERMXOR_V2DI): Likewise.
	(VPERMXOR_V4SI: Likewise.
	(VPERMXOR_V8HI: Likewise.
	(VPERMXOR_V16QI: Likewise.
	(VSHASIGMAW): Likewise.
	(VSHASIGMAD): Likewise.
	(VPMSUM): Likewise.
	(VPERMXOR): Likewise.
	(VSHASIGMA): Likewise.

	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
	__CRYPTO__ if the crypto instructions are available.
	(altivec_overloaded_builtins): Add support for overloaded power8
	builtins.

	* config/rs6000/rs6000.c (rs6000_expand_ternop_builtin): Add
	support for power8 crypto builtins.
	(builtin_function_type): Likewise.
	(altivec_init_builtins): Add support for builtins that take vector
	long long (V2DI) arguments.

	* config/rs6000/crypto.md: New file, define power8 crypto
	instructions.

2013-05-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
	    Pat Haugen <pthaugen@us.ibm.com>
	    Peter Bergner <bergner@vnet.ibm.com>

	* doc/invoke.texi (Option Summary): Add power8 options.
	(RS/6000 and PowerPC Options): Likewise.

	* doc/md.texi (PowerPC and IBM RS6000 constraints): Update to use
	constraints.md instead of rs6000.h.  Reorder w* constraints.  Add
	wm, wn, wr documentation.

	* gcc/config/rs6000/constraints.md (wm): New constraint for VSX
	registers if direct move instructions are enabled.
	(wn): New constraint for no registers.
	(wq): New constraint for quad word even GPR registers.
	(wr): New constraint if 64-bit instructions are enabled.
	(wv): New constraint if power8 vector instructions are enabled.
	(wQ): New constraint for quad word memory locations.

	* gcc/config/rs6000/predicates.md (const_0_to_15_operand): New
	constraint for 0..15 for crypto instructions.
	(gpc_reg_operand): If VSX allow registers in VSX registers as well
	as GPR and floating point registers.
	(int_reg_operand): New predicate to match only GPR registers.
	(base_reg_operand): New predicate to match base registers.
	(quad_int_reg_operand): New predicate to match even GPR registers
	for quad memory operations.
	(vsx_reg_or_cint_operand): New predicate to allow vector logical
	operations in both GPR and VSX registers.
	(quad_memory_operand): New predicate for quad memory operations.
	(reg_or_indexed_operand): New predicate for direct move support.

	* gcc/config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED):
	Inherit from ISA_2_4_MASKS, not ISA_2_2_MASKS.
	(ISA_2_7_MASKS_SERVER): New mask for ISA 2.07 (i.e. power8).
	(POWERPC_MASKS): Add power8 options.
	(power8 cpu): Use ISA_2_7_MASKS_SERVER instead of specifying the
	various options.

	* gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
	Define _ARCH_PWR8 and __POWER8_VECTOR__ for power8.

	* gcc/config/rs6000/rs6000.opt (-mvsx-timode): Add documentation.
	(-mpower8-fusion): New power8 options.
	(-mpower8-fusion-sign): Likewise.
	(-mpower8-vector): Likewise.
	(-mcrypto): Likewise.
	(-mdirect-move): Likewise.
	(-mquad-memory): Likewise.

	* gcc/config/rs6000/rs6000.c (power8_cost): Initial definition for
	power8.
	(rs6000_hard_regno_mode_ok): Make PTImode only match even GPR
	registers.
	(rs6000_debug_reg_print): Print the base register class if
	-mdebug=reg.
	(rs6000_debug_vector_unit): Add p8_vector.
	(rs6000_debug_reg_global): If -mdebug=reg, print power8 constraint
	definitions.  Also print fusion state.
	(rs6000_init_hard_regno_mode_ok): Set up power8 constraints.
	(rs6000_builtin_mask_calculate): Add power8 builtin support.
	(rs6000_option_override_internal): Add support for power8.
	(rs6000_common_init_builtins): Add debugging for skipped builtins
	if -mdebug=builtin.
	(rs6000_adjust_cost): Add power8 support.
	(rs6000_issue_rate): Likewise.
	(insn_must_be_first_in_group): Likewise.
	(insn_must_be_last_in_group): Likewise.
	(force_new_group): Likewise.
	(rs6000_register_move_cost): Likewise.
	(rs6000_opt_masks): Likewise.

	* config/rs6000/rs6000.h (ASM_CPU_POWER8_SPEC): If we don't have a
	power8 capable assembler, default to power7 options.
	(TARGET_DIRECT_MOVE): Likewise.
	(TARGET_CRYPTO): Likewise.
	(TARGET_P8_VECTOR): Likewise.
	(VECTOR_UNIT_P8_VECTOR_P): Define power8 vector support.
	(VECTOR_UNIT_VSX_OR_P8_VECTOR_P): Likewise.
	(VECTOR_MEM_P8_VECTOR_P): Likewise.
	(VECTOR_MEM_VSX_OR_P8_VECTOR_P): Likewise.
	(VECTOR_MEM_ALTIVEC_OR_VSX_P): Likewise.
	(TARGET_XSCVDPSPN): Likewise.
	(TARGET_XSCVSPDPN): Likewsie.
	(TARGET_SYNC_HI_QI): Likewise.
	(TARGET_SYNC_TI): Likewise.
	(MASK_CRYPTO): Likewise.
	(MASK_DIRECT_MOVE): Likewise.
	(MASK_P8_FUSION): Likewise.
	(MASK_P8_VECTOR): Likewise.
	(REG_ALLOC_ORDER): Move fr13 to be lower in priority so that the
	TFmode temporary used by some of the direct move instructions to
	get two FP temporary registers does not force creation of a stack
	frame.
	(VLOGICAL_REGNO_P): Allow vector logical operations in GPRs.
	(MODES_TIEABLE_P): Move the VSX tests above the Altivec tests so
	that any VSX registers are tieable, even if they are also an
	Altivec vector mode.
	(r6000_reg_class_enum): Add wm, wr, wv constraints.
	(RS6000_BTM_P8_VECTOR): Power8 builtin support.
	(RS6000_BTM_CRYPTO): Likewise.
	(RS6000_BTM_COMMON): Likewise.

	* config/rs6000/rs6000.md (cpu attribute): Add power8.
	* config/rs6000/rs6000-opts.h (PROCESSOR_POWER8): Likewise.
	(enum rs6000_vector): Add power8 vector support.

[gcc/testsuite]
2013-05-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
	    Pat Haugen <pthaugen@us.ibm.com>
	    Peter Bergner <bergner@vnet.ibm.com>

	* gcc.target/powerpc/crypto-builtin-1.c: New file, test for power8
	crypto builtins.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199217 138bc75d-0d04-0410-961f-82ee72b054a4
	* config.host (powerpc-*-elf*): Add rs6000/t-savresfgpr to tmake_file.
	(powerpc-wrs-vxworks): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199219 138bc75d-0d04-0410-961f-82ee72b054a4
2013-05-22  Mark Mitchell  <mark@codesourcery.com>
	    Sandra Loosemore  <sandra@codesourcery.com>

	libjava/	    
	* configure.ac (dbexecdir): Base on $(toolexeclibdir), not
	$(libdir).
	* Makefile.am (pkgconfigdir): Likewise.
	* configure: Regenerated.
	* Makefile.in: Regenerated.
	* gcj/Makefile.in: Regenerated.
	* include/Makefile.in: Regenerated.
	* testsuite/Makefile.in: Regenerated.

	libjava/classpath/
	* configure.ac: Define host_noncanonical and target_noncanonical.
	Support --enable-version-specific-runtime-libs.
	* m4/acinclude.m4 (CLASSPATH_TOOLEXECLIBDIR): Match libjava
	definition of toolexeclibdir.
	* configure: Regenerated.
	* Makefile.in: Regenerated.
	* doc/api/Makefile.in: Regenerated.
	* doc/Makefile.in: Regenerated.
	* examples/Makefile.in: Regenerated.
	* external/jsr166/Makefile.in: Regenerated.
	* external/Makefile.in: Regenerated.
	* external/relaxngDatatype/Makefile.in: Regenerated.
	* external/sax/Makefile.in: Regenerated.
	* external/w3c_dom/Makefile.in: Regenerated.
	* include/Makefile.in: Regenerated.
	* lib/Makefile.in: Regenerated.
	* native/fdlibm/Makefile.in: Regenerated.
	* native/jawt/Makefile.in: Regenerated.
	* native/jni/Makefile.in: Regenerated.
	* native/jni/gconf-peer/Makefile.in: Regenerated.
	* native/jni/gstreamer-peer/Makefile.in: Regenerated.
	* native/jni/gtk-peer/Makefile.in: Regenerated.
	* native/jni/java-io/Makefile.in: Regenerated.
	* native/jni/java-lang/Makefile.in: Regenerated.
	* native/jni/java-math/Makefile.in: Regenerated.
	* native/jni/java-net/Makefile.in: Regenerated.
	* native/jni/java-nio/Makefile.in: Regenerated.
	* native/jni/java-util/Makefile.in: Regenerated.
	* native/jni/Makefile.in: Regenerated.
	* native/jni/midi-alsa/Makefile.in: Regenerated.
	* native/jni/midi-dssi/Makefile.in: Regenerated.
	* native/jni/native-lib/Makefile.in: Regenerated.
	* native/jni/qt-peer/Makefile.in: Regenerated.
	* native/jni/xmlj/Makefile.in: Regenerated.
	* native/Makefile.in: Regenerated.
	* native/plugin/Makefile.in: Regenerated.
	* resource/Makefile.in: Regenerated.
	* scripts/Makefile.in: Regenerated.
	* tools/Makefile.in: Regenerated.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199221 138bc75d-0d04-0410-961f-82ee72b054a4
/cp
2013-05-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/57352
	* parser.c (cp_parser_conversion_type_id): Set up
	parser->type_definition_forbidden_message before calling
	cp_parser_type_specifier_seq.

/testsuite
2013-05-22  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/57352
	* g++.dg/parse/crash62.C: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199224 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199228 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/
	* bb-reorder.c (branch_threshold): make const
	(exec_threshold): ditto



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199230 138bc75d-0d04-0410-961f-82ee72b054a4
	PR c++/56915
	* semantics.c (maybe_add_lambda_conv_op): Give up if the call op
	isn't defined.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199231 138bc75d-0d04-0410-961f-82ee72b054a4
	PR c++/56930
	* call.c (convert_like_real): Use cp_convert_and_check.
	* cvt.c (cp_convert_and_check): Use maybe_constant_value.
	* semantics.c (cxx_eval_constant_expression): Handle LTGT_EXPR.
	(potential_constant_expression_1): Handle OMP_ATOMIC*.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199232 138bc75d-0d04-0410-961f-82ee72b054a4
add missing file

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199233 138bc75d-0d04-0410-961f-82ee72b054a4
2013-05-23  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/57341
	* ira.c (validate_equiv_mem_from_store): Use anti_dependence
	instead of true_dependence.

	* gcc.dg/torture/pr57341.c: New testcase.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199237 138bc75d-0d04-0410-961f-82ee72b054a4
	PR middle-end/57344
	* expmed.c (store_split_bit_field): If op0 is a REG or
	SUBREG of a REG, don't lower unit.  Handle unit not being
	always BITS_PER_WORD.

	* gcc.c-torture/execute/pr57344-1.c: New test.
	* gcc.c-torture/execute/pr57344-2.c: New test.
	* gcc.c-torture/execute/pr57344-3.c: New test.
	* gcc.c-torture/execute/pr57344-4.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199238 138bc75d-0d04-0410-961f-82ee72b054a4