Working on an irq handler prototype
Interrupt vector and stack support improved
Cosmetics and tweaks
Reducing instruction count and register pressure
Further reducing register pressure
Explain changes needed for non-PIC vectors
Skeleton of EIB
Cosmetics, renaming, basic read support
EIB compiles in iverilog now ; fleshing out
Accumulate bits in ISR ; clear bit individually
Factoring, reserving a stack entry
Remove state machine skeleton, unneeded
Logic fixes, edge cases, trampoline
Refactoring and safety improvements
Set up first two frames with disabled interrupts
Working on a testbench for the EIB
Cosmetics and EIB testbench improvements
Skeletal Core support for EIB

The EIB has not been hooked up, and the trap signal is currently tied
low. Some new wires have been introduced in Core whose names should be
subject to revision. Behaviour appears to be correct for non-trapping
conditions. Next step is to integrate the EIB (from eib.v) and test.
Cosmetics in testbench
Integrate EIB into Top