Fix L1 voltage range selection and tidy up the clock setup

Ran into a nasty bug in the way the voltage regulator is setup in the L1 code.  Removed some pointless distractions at the same time.  (Actual commits have proper commit messages)

Want to let someone else look at this before just merging it myself.  I'm quite surprised we never saw this on revision W silicon, it shouldn't have ever worked really.  But the new revision V silicon gets very upset at trying to run at 32Mhz from flash in voltage range 3.