msm: cache_erp: Handle recoverable L1 errors

Some CPU designs may be able to recover from certain types
of L1 instruction cache errors. Rather than panicing
whenever any kind of L1 error is encountered, add an option
to selectively panic on recoverable L1 errors

Change-Id: Id8beb0e58d41fa5319f4ca76c5f35e2162f8b704
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
(cherry picked from commit e1aba3d9b510d34e8309669d811a6f01568858dc)

Conflicts:

	arch/arm/mach-msm/Kconfig

Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Signed-off-by: Shruthi Krishna <skrish@codeaurora.org>
msm: event_timer: Support to add event timers.

Add support to allow drivers to specify future events
that need to be treated as hard deadlines. Upon event timer
expiry the driver will be notified by callback function
that the driver provides.
The pm code can query the earliest event and modify
the event timer accounting for the back off based on the
latency of the low power mode being entered.

(cherry picked from commit 388c308cebef8e9cdbd80608a032abc810d46e62)
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>

Change-Id: I461e2c31c285b93588aa56dd25905efab020e0c8
Signed-off-by: Neha Pandey <nehap@codeaurora.org>