Fixed indentation.
Manually assign flags register.
Do not move instructions upwards if there is an output dependency.

The code requires assigned registers but no kept Proj.

This fixes backend/udiv.c on SPARC.
Added peephole optimization for AddCC and SubCC.
Confirm node construction cannot handle bad blocks.

This fixes 176.gcc.
Added a new builtin for saturated increment.

The builtin can be used to generate fast code for unsigned division by constant.

Code generation is supported for the IA32 and the SPARC backend.
Since our ARM backend currently has no Add with Carry instruction,
the builtin is currently not supported on Arm.
The same holds for the AMD64 backend, which does not support a division yet.
Improved optimization of division by constants.

This implements the "round down" algorithm by ridiculous_fish (see
Faster Unsigned Division by Constants,
http://ridiculousfish.com/blog/posts/labor-of-division-episode-iii.html),
which improves the generated code for some constants (like 42).