arm: tegra: check per device how much current is supported for pmu
video: tegra: host: Support multiple mem types

Support multiple memory handle types.

Change-Id: Ieae49d93be88616dde2498da98c66671cb3090a3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/135085
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
video: tegra: clean up memory alloc code paths
video: tegra: 3d register read patch (see commit msg)

move 3d register read operations to the 3d device itself
and let 3d devices on tegra3 use direct to memory to read
the operations

Conflicts:
	include/linux/nvhost.h
video: tegra: implement sg_table using DMA addresses
video: tegra: host: Pin each gather only once

Pin each gather only once. For each gather pinned, we copy the
acquired address to the rest of the gathers with the same memory
handle.

Change-Id: I47442cd5a167042b12a7fb4760a7ef0b83bdb9bd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139301
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
video: tegra: host: Add dmabuf support

Change-Id: I316fc5b8cc748b29e4f9776e27610d7468682311
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/139302
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
configs: enable DMABUF
video: tegra: disable sync points
timekeeping: Fix time moving backwards

Changed the calculation logic that sometimes calculates
the time wrong.

Sometimes there is an overflow when the tv_nsec field in
the timespec structure is being added since it is 32-bit.

To resolve this issue nsec variable is being added first
so that the addition is performed in 64 bit signed format.

Bug 1217429

Change-Id: I9c65da88f02596ba73c47be6342ed909e650db22
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/195092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Shridhar Rasal <srasal@nvidia.com>
video: tegra: use module id from hw headers
video: tegra: add header for defining classids
video: tegra: also use hw headers for methods
video: tegra: fix deallocate job and NULL check
video: tegra: host: Set submit timeout to 10s

Set default timeout for submits to 10 seconds.

Change-Id: Ic2bf8fb0a5274f5c04e776dee0df609deb12a5a6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/141956
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
video: tegra: remove irq_requested flags

Conflicts:
	drivers/video/tegra/host/nvhost_acm.c
video: tegra: fix panel init sequence

panel spec recommends delays between each init cmd
video: tegra: host: add per device module-reg-read-write ioctl

- currently, the ioctl NVHOST_IOCTL_CTRL_MODULE_REGRDWR is
a part of nvhost-ctrl node
- however, it doesn't deal with host1x. infact it read/write
actual module registers
- for this kernel needs to maintain a list of all nvhost_devices
registered for a SoC. currently, this is encapsulated within
nvhost_bus which provides a iterator to walk these device list
- however, once we phase out nvhost_bus and adopt the platform_bus
we do not have a way to know the list of these devices
- this commit adds a new per-device ioctl for module register
read-write functionality
- all the new code should be using this new per device ioctl. the
old will be removed as soon as all the clients are ready to use
new ioctl

bug 1154790

Change-Id: I0552aec61a4506243461de82ac0cf6e4c1f3b220
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/141579
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
video: tegra: nvmap: Introduce dma-buf exporter

Based on Terje's host nvmap exporter.

Change-Id: I9627ac9c4fc838f2e2c5c95b6972aa6185be7d6b
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Cc: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/133500
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
scatterlist: add sg_alloc_table_from_pages