Fix target-customized spilling in the register scavenger

This is a follow-up to r178073 (which should actually make target-customized
spilling work again).

I still don't have a regression test for this (but it would be good to have
one; Thumb 1 and Mips16 use this callback as well).

Patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178137 91177308-0d34-0410-b5e6-96231b3b80d8
Disable ASan/MSan symbolization of reports in tests.

It was using an instrumented symbolizer binary, which is a potential fork bomb.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178139 91177308-0d34-0410-b5e6-96231b3b80d8
Switch to LLVM support function abs64 to keep VS2008 happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178141 91177308-0d34-0410-b5e6-96231b3b80d8
Print PPC ZERO as 0 (not r0) even on Darwin

It seems that the Darwin PPC assembler requires r0 to be written as 0 when it
means 0 (at least in lwarx/stwcx.). Fixes PR15605.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178142 91177308-0d34-0410-b5e6-96231b3b80d8