msm: clock-8974: Don't program an N value of zero

The MN counter gets into a bad state if the N register
is programmed with a value equivalent to setting N = 0.
Don't do this.

Change-Id: I40360498cab82ae5de5aed7e2247401b4366beb6
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-8974: Enable GPLL0's AUX2 output for acpuclock

GPLL0's AUX2 output is used as a clock source for the CPUs and
L2. Enable it.

Change-Id: I5087584aca69cc3a447eda8de1f34428742ab492
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: clock-8974: Remove support for mmss_mmssnoc_ahb_clk

The RPM sets up the MMSSNOC AHB clock. Don't control this
clock.

Change-Id: I0a7a113ffa5404d6a758b1affbe18e699e2fa6c3
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
persistent_ram: fix wrong error code

need to be "return -EINVAL" on error

Change-Id: Ie465ecc4ebf64e205994829af8b33481c6139b64
Merge "msm: footswitch: Remove HDMI clocks from MDP footswitch data on 8627" into msm-3.4
Merge "msm: sps: add verification of IOVECs for sps_transfer" into msm-3.4
Merge "msm: Kconfig: 9625 to support GPIO_MSM_V3" into msm-3.4
Merge "msm: board-8974: Switch from stub to krait regulator for 8841 S5-S8" into msm-3.4
arm/dt: msm8974: Disable simulation UARTs by default

Disable the simulation UARTs in the top-level DTSI file and
explicitly enable them in the simulation DTS files to avoid
the maintenance burden of disabling them on all new
targets.

Change-Id: Ifc85b131c13abbf13ebe6066388e2c64efea0a51
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
msm_serial_hs_lite: Unconditionally control UART AHB clock

Control the UART AHB clock regardless of whether a GSBI
resource is present, as the AHB clock is needed to access
the UARTDM core registers in addition to the GSBI
registers.

Change-Id: Idca5ac07c133b67ac7c02ca3304a46794659e010
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
defconfig: Enable Mercury decoder.

Mercury decoder is the Hardware jpeg decoder engine.

Change-Id: Id28f7f5b7c2039407eae31a5eac000de1371119a
Signed-off-by: Kalyani Oruganti <kalyanio@codeaurora.org>
msm_fb: Allow MDP hardware init for continuous splashscreen

MDP hw init is getting avoided for MDP3.x targets to support
continuous splashscreen. This avoids complete initialization
of MDP and hence usecases are failing. This change allows the
hw init.

Change-Id: Ib0304b54bda4a62a20716bde85fe94b2dcfe6824
Signed-off-by: Pradeep Jilagam <pjilagam@codeaurora.org>
Bluetooth: hci_ldisc: watchdog timeout while BT file transfer

Serial core's uart_write_wakeup( ) is used to unthrottle line
discipline to send more data notifying that there is less number
of data available in TTY circular buffer by MSM HSUART driver with
uart port spinlock acquire. Here serial core is calling
HCI Line Discipline driver's hci_uart_tty_wakeup( ) without scheduling
tasklet in 3.4 kernel compare to 3.0 kernel. Due to that HCI
Line Discipline driver pushes all available data to TTY Core as part of
hardirq context in 3.4 kernel compare to softirq context on 3.0 kernel,
which is causing watchdog timeout issue. Hence move all
hci_uart_tty_wakeup() work to tasklet context to resolve this issue.

Change-Id: I7e5d98d3cda7b6c862e97799cddbfbe97a28467f
Signed-off-by: Ram Mohan Korukonda <rkorukon@codeaurora.org>
Perf: Extend named-pmu grammar

This patch allows "-" in a PMU name and
prints it along with counter output.

Previously, perf would just show "pmu" which can
get confusing for the user.

Change-Id: Ib4fb0fa67c1d5f2e15de6e1cb9c35964449d8ad8
Signed-off-by: Ashwin Chaugule <ashwinc@codeaurora.org>
Merge changes Idca5ac07,Ifc85b131,I0a7a113f,I5087584a,I40360498 into msm-3.4

* changes:
  msm_serial_hs_lite: Unconditionally control UART AHB clock
  arm/dt: msm8974: Disable simulation UARTs by default
  msm: clock-8974: Remove support for mmss_mmssnoc_ahb_clk
  msm: clock-8974: Enable GPLL0's AUX2 output for acpuclock
  msm: clock-8974: Don't program an N value of zero
regulator: qpnp-regulator: Update FTSMPS voltage ranges to match hardware

Update the FTSMPS voltage ranges so that they accurately reflect
the physical output voltages resulting from set points
programmed on PMIC hardware.

Previous hardware documentation contained these equations:
range == 0: Voutput = setpoint * 5 mV + 80 mV
range == 1: Voutput = setpoint * 10 mV + 160 mV

The actual hardware response is:
range == 0: Voutput = setpoint * 5 mV
range == 1: Voutput = setpoint * 10 mV

Update range data in qpnp-regulator to match the true mapping.

Change-Id: Iabf00591f79705de721f571a347afb15c8b7140e
Signed-off-by: David Collins <collinsd@codeaurora.org>
msm: ssr: Panic on concurrent subsystem_restart()

Before "msm: SSR: Pull struct restart_wq_data into struct
subsys_device" we would allocate a work struct for every instance
of a subsystem_restart() call. After that change, we only
allocate one instance of the work during intialization and we
serialize calls to queue_work() with a restarting flag in the
subsys_device structure. This has the unfortunate side effect of
silently ignoring a subsystem_restart() call made while a
subsystem is in the process of restarting (i.e. hasn't reached
the end of subsystem_restart_wq_func().

Add a refcount around the wake lock so that the system stays out
of suspend for as long as any restart work item is being processed.
Then queue the work unconditionally so that the work queue
function can determine that a subsystem restart is happening
while the subsystem is powering up.

Change-Id: Ide5627a29a0df7c1c102cf508ce577ce4f751140
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: pil-riva: Shutdown RIVA via toplevel reset

The reset bit inside the PMU may not be accessible if RIVA is in
power collapse. Therefore, don't assert the cCPU reset because
Linux may hang trying to write the PMU register. Instead, just
assert the toplevel reset that resets the entire RIVA subsystem.

Change-Id: I1f1094bc7974b3181b18c2246db5fb5a6c4ed812
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: clock-8974: Correct pcm clock lookup name

Sound cards are not getting detected due to wrong
name of the clock used for msm-dai-q6.4106 device.
Correct the name to pcm_clk.

Change-Id: Ib54946b7d891fe1e6ce85e55e0a6d944cbd436ba
Signed-off-by: Phani Kumar Uppalapati <phanik@codeaurora.org>
hwmon: qpnp-adc: Fix register read/writes

Fix reading/writing to the correct ADC peripheral offset
address during SPMI read/writes. While adding multiple
channels an incorrect channel index initialization causes
the ADC reads to occur only on one channel. Fix it by
initializing the channel index only once at init.

The configure api has few register read/writes done
without using the bit mask field. Fix it by reading
the register and updating only the concerned bits.
Also add more comments to the configure api to list
out the steps for each register configuration and
fix using the correct print statements on error.

Change-Id: I0ce67163c5f27021f5fb0905fe601f4b1e0ee8b8
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>