clk: exynos5250: Put recommended EPLL pmsk values

This patch corrects the EPLL pmsk values as per the
Exynos5250 UM.

BUG=chrome-os-partner:19879
Test=Boot snow and run "aplay -D hw:0 <file_name>".
     Test with different sampling rates.

Change-Id: Ib3d05f216deb37f0d8db51e2acd9f077ef68eb74
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/58522
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
clk: exynos5420: correct the epll rate table

This patch corrects the epll rate table required
for audio on Exynos 5420. The table used is the
same as that on Exynos 5250.

BUG=chrome-os-partner:19879
Test=Boot pit and run "aplay -D hw:0 <file_name>"
     Test with different sampling rates.

Change-Id: Ifb771209eeb2361f1aad4ee1f47d93a7b809223c
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/58523
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
ARM: fault: assume no context when IRQs are disabled during data abort.

Bail out early if IRQs are disabled in do_page_fault or else
  [14415.157266] BUG: sleeping function called from invalid context at arch/arm/mm/fault.c:301

Russell King's idea from
  http://comments.gmane.org/gmane.linux.ports.arm.omap/59256

Signed-off-by: JP Abgrall <jpa@google.com>
(cherry picked from commit 0e473aec2868435936620ab0571ba8a688f76466)
(cherry-picked from:
	https://android.googlesource.com/kernel/common/+/android-3.4)
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>

Change-Id: I393abbd63ed916171e92915b4c8d7bf781ad8ff9
Reviewed-on: https://gerrit.chromium.org/gerrit/58356
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>
clk: samsung: specify both lock and control registers for pll35xx/pll36xx

The PLL driver currently assume that the control registers are at an
offset of 0x100 from the lock register for pll35xx and pll36xx PLLs.
While this is true for Exynos4 and Exynos5250, it is not for Exynos5420.
This modifies the PLL driver so that the base address of both the lock
and control registers are specified when registering a pll35xx/pll35xx
PLL.

BUG=chrome-os-partner:20104
TEST=Boots on Snow and Pit; audio still works on both.

Change-Id: Ie9433ff577ee569c4a5a34b1f588b78a9a11afa8
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58411
Reviewed-by: Doug Anderson <dianders@chromium.org>
arm: exynos5420: save CLKSRC_TOP4 before powergating

When mfc/gsc pd is power gated after S2R, the CLKSRC_TOP4 register is
getting modified. This modifies the MUX for aclk333 which results in the
source clk of aclk333 getting set to OSCCLK and this results in slower
performance of video playback. This patch adds a temporary software
workaround to this hardware issue by saving and restoring CLKSRC_TOP4
register before/after powergating.

Note: A previous patch exists for Exynos5250, where we were saving and
restoring EXYNOS5_CLKSRC_TOP3 but for Exynos5420, we need to save and
restore EXYNOS5420_CLKSRC_TOP4 which are two different registers.

To check this issue on Peach:
Boot and run S2R once.
armio 0x10020210 -> 11110111

Power on and power gate MFC (after S2R)
armiow 0x10044060 0x7
armiow 0x10044060 0x0

Now check TOP4:
armio 0x10020210 -> 01110111
The 28th bit (MUX_ACLK_333_SUB_SEL) gets toggled.

BUG=chrome-os-partner:20047
TEST=Run vdau on Peach before and after S2R. There should be no drop in
performance.
Before: FPS drops from ~180 -> ~140.
After: No such drop.

Change-Id: I1461b06be6c16c5f3ec04a6e7a120ca046ecae60
Signed-off-by: Prathyush K <prathyush.k@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/57602
Tested-by: Prathyush Kalashwaram <prathyush@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Prathyush Kalashwaram <prathyush@chromium.org>
CHROMIUM: Input: atmel_mxt_ts - Fire error uevent in some failing cases

Fire error uevent to notify userspace (currently the crash_reporter)
when 1) firmware update fails 2) reading messages fails in IRQ handler,
mainly for userspace monitoring tools to collect more debugging information.

Also more verbose in logging error ret codes.

Signed-off-by: Yufeng Shen <miletus@chromium.org>

BUG=chromium:226186
TEST=1. On Pixel, replace the touchscreen firmware file
	/opt/google/touch/firmware/162.0_1.1.170.bin
    	with an empty file with the same name
     2. Force touchscreen firmware update
        /opt/google/touch/scripts/chromeos-touch-firmware-update.sh -d atmel_mxt_ts -f -n maxtouch-ts.fw
     3. After the firmware update fails, check crash report exists at
        /var/spool/crash/change__i2c_atmel_mxt_ts.XXX

Reviewed-on: https://gerrit.chromium.org/gerrit/48241
Reviewed-by: Benson Leung <bleung@chromium.org>
Commit-Queue: Yufeng Shen <miletus@chromium.org>
Tested-by: Yufeng Shen <miletus@chromium.org>

Change-Id: If6c9153d7e8922d5fb691b0d9bf901b1c716a98b
Reviewed-on: https://gerrit.chromium.org/gerrit/58122
Reviewed-by: Andrew de los Reyes <adlr@chromium.org>
Commit-Queue: Yufeng Shen <miletus@chromium.org>
Tested-by: Yufeng Shen <miletus@chromium.org>
CHROMIUM: Revert "ALSA: hda - Use standard sort function in hda_auto_parser.c"

This reverts commit b9030a005d5810ab9e3683469d928aa0b537a4c4.

This commit was intended to just clean up, but the new sort isn't
stable and the re-ordering of the microphones breaks lumpy's built in
mic.  This is no longer an issue in 3.9+ since the order of the mics
doesn't matter after switching to the generic parser.  Don't carry
this patch past 3.8.

BUG=249459
TEST=manual, boot lumpy and record audio.

Change-Id: If401c6c13e2a910bc65bfe3d11df06985c63b115
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58566
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
drm/exynos: Split manager/display/subdrv

This patch splits display and manager from subdrv. The result is that
crtc functions can directly call into manager callbacks and encoder
functions can directly call into display callbacks. This will allow
us to remove the exynos_drm_hdmi shim and support mixer/hdmi & fimd/dp
with common code.

BUG=chromium:234846
TEST=Tested on snow, no regressions

Change-Id: Ic8909d9bb11dad9ca1be8299ec3cdf656a290522
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56287
drm/exynos: Remove exynos_drm_hdmi shim

This patch trims exynos_drm_hdmi out of the driver. The reason it
existed in the first place was to make up for the mixture of
display/overlay/manager ops being spread across hdmi and mixer. With
that code now rationalized, mixer and hdmi map directly to
exynos_drm_crtc and exynos_drm_encoder, respectively. Since there is a
1:1 mapping, we no longer need this layer.

BUG=chromium:234846
TEST=Tested on snow, no regressions

Change-Id: Ie683b0120b0dc4d6d575a2405fcc88052de9bf4b
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/57261
drm/exynos: Use drm_mode_copy to copy modes

This patch changes the manual copying of mode to adjusted_mode in
mode_fixup to use drm_mode_copy instead of handling things manually.

BUG=None
TEST=No regressions

Change-Id: Id0daa5a472981aeca69a0522c7939fcc8bcd9981
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58225
drm/exynos: Check error from enable_vblank

This patch checks the return value from the enable_vblank crtc call.

BUG=chromium:234847
TEST=Tested on snow, no regressions found

Change-Id: If05a8bd35aec86c1bc901666380286a78ddd5a23
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56288
BACKPORT: drm/i915: factor out GMCH panel fitting code and use for eDP v3

This gets the panel fitter working on eDP on VLV, and should also apply
to eDP panels on G4x chipsets (if we ever detect and mark an all-in-one
panel as eDP anyway).

A few cleanups are still possible on top of this, for example the LVDS
border control could be placed in the LVDS encoder structure and updated
based on the result of the panel fitter calculation.

Multi-pipe fitting isn't handled correctly either if we ever get a config
that wants to try the panel fitter on more than one output at a time.

v2: use pipe_config for storing pfit values (Daniel)
    add i9xx_pfit_enable function for use by 9xx and VLV (Daniel)
v3: fixup conflicts and lvds_dither check

Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: fix up botched conflict resolution from Jesse:
- border = LVDS_BORDER_ENABLE was lost for CENTER scaling
- comment about gen2/3 panel fitter scaling was lost
- dev_priv->lvds_dither reintroduced.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 2dd24552cab40ea829ba3fda890eeafd2c4816d8)

Conflicts:
	drivers/gpu/drm/i915/intel_display.c
	drivers/gpu/drm/i915/intel_drv.h
	drivers/gpu/drm/i915/intel_lvds.c
(context changes, and accounting for not taking other commits)

BUG=chrome-os-partner:19682
TEST=With entire patch series applied, observe PC7 residency via powertop in
     crosh.
Change-Id: Ic286d543850113fc7e4c2a3e026fcba2f90913dc
Reviewed-on: https://gerrit.chromium.org/gerrit/56466
Tested-by: Josh Triplett <josh@joshtriplett.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Yuly Novikov <ynovikov@chromium.org>
Commit-Queue: Josh Triplett <josh@joshtriplett.org>
clk: samsung: Add GPLL freq table for exynos5250 SoC

Adds the GPLL freq table for exynos5250 SoC

BUG=chrome-os-partner:19586
TEST=Built and booted on snow.
echo off > /sys/bus/platform/drivers/mali/11800000.mali/dvfs
echo 350 > /sys/bus/platform/drivers/mali/11800000.mali/clock
cat /sys/bus/platform/drivers/mali/11800000.mali/clock
Current sclk_g3d[G3D_BLK] = 350Mhz
echo 450 > /sys/bus/platform/drivers/mali/11800000.mali/clock
cat /sys/bus/platform/drivers/mali/11800000.mali/clock
Current sclk_g3d[G3D_BLK] = 450Mhz

Change-Id: I2a3fbc7cf500c923a0946aa2dced6678dafea663
Signed-off-by: Akshu Agrawal <akshu.a@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/57402
Commit-Queue: Akshu Agrawal <akshu@chromium.org>
Reviewed-by: Akshu Agrawal <akshu@chromium.org>
Tested-by: Akshu Agrawal <akshu@chromium.org>
clk: exynos5250: Add clocks for GPU dvfs

Adds sclk_gpll and fout_gpll. Also, registers fout_gpll
for dt lookup

BUG=chrome-os-partner:19586
TEST=Built and booted on snow.
echo off > /sys/bus/platform/drivers/mali/11800000.mali/dvfs
echo 350 > /sys/bus/platform/drivers/mali/11800000.mali/clock
cat /sys/bus/platform/drivers/mali/11800000.mali/clock
Current sclk_g3d[G3D_BLK] = 350Mhz
echo 450 > /sys/bus/platform/drivers/mali/11800000.mali/clock
cat /sys/bus/platform/drivers/mali/11800000.mali/clock
Current sclk_g3d[G3D_BLK] = 450Mhz

Change-Id: I7a76180fcbd0210e6349f34b29cc8c43d8863651
Signed-off-by: Akshu Agrawal <akshu.a@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/57403
Commit-Queue: Akshu Agrawal <akshu@chromium.org>
Reviewed-by: Akshu Agrawal <akshu@chromium.org>
Tested-by: Akshu Agrawal <akshu@chromium.org>
dts: Exynos5250: Update clock node for GPU DVFS

This patch adds fout_gpll and mout_gpll needed for GPU dvfs
to the mali node.

BUG=chrome-os-partner:19586
TEST=
echo off > /sys/bus/platform/drivers/mali/11800000.mali/dvfs
echo 350 > /sys/bus/platform/drivers/mali/11800000.mali/clock
cat /sys/bus/platform/drivers/mali/11800000.mali/clock
Current sclk_g3d[G3D_BLK] = 350Mhz
echo 450 > /sys/bus/platform/drivers/mali/11800000.mali/clock
cat /sys/bus/platform/drivers/mali/11800000.mali/clock
Current sclk_g3d[G3D_BLK] = 450Mhz

Change-Id: I7d52f8d3c45086092c7f744c0c598461f9f0ae4c
Signed-off-by: Akshu Agrawal <akshu.a@samsung.com>
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/56175
Commit-Queue: Akshu Agrawal <akshu@chromium.org>
Reviewed-by: Akshu Agrawal <akshu@chromium.org>
Tested-by: Akshu Agrawal <akshu@chromium.org>
Turn TPS65090 FET for SD card to always-on

BUG=chrome-os-partner:19539
TEST=boot successfully from SD card on reworked board

Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org>

Change-Id: I08b132bbe097282e669877845109abe4dc71cb73
Reviewed-on: https://gerrit.chromium.org/gerrit/58741
Commit-Queue: Katie Roberts-Hoffman <katierh@chromium.org>
Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>
Tested-by: Katie Roberts-Hoffman <katierh@chromium.org>
CHROMIUM: arm: exynos5420: Add clock muxing setup; reparent SPI

We somehow need to setup clock muxing and would rather not rely on
U-Boot setting it up properly for us (it makes us fragile against
U-Boot changes).

The setup of clock muxing is a mix of the design of the board and the
way that the software is currently setup.  Because it's not purely
defined by the board, it can't live in the device tree.  That means
that (at the moment) the best place for it is in code.

At the moment we just use this muxing infrastructure to setup SPI
clocks.  We should go through and add other muxing as needed (or
perhaps fill in the whole table?)

This is not a great solution but is a stopgap until someone
(upstream?) comes up with a better solution.  Stopgap solution
suggested by Olof Johansson.

BUG=chrome-os-partner:20013
TEST=Run 'find /sys/kernel/debug/clk -name mout_spi0'
/sys/kernel/debug/clk/fin_pll/fout_mpll/sclk_mpll/mout_spi0

Change-Id: Ic36bef6fa991aed7138d69b5216aa8fcd59997c9
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58454
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Olof Johansson <olofj@chromium.org>
s5p-mfc: fix display delay for h264 streams

V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE should
only enforce the specific display delay, and not always.

User should first enable the display delay, followed by the
'display_delay' number of frames for initial display delay.

Note: This display delay is valid only for H.264 decoding only.

BUG=chrome-os-partner:20177
TEST=run vdatest on src/content/common/gpu/testdata/test-25fps.h264 in
chromium sources.

Change-Id: I347b18356f6f197d5d4710abaaa7719852522fd2
Signed-off-by: Kiran AVND <avnd.kiran@samsung.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/58669
Reviewed-by: Arun Kumar K <arunkk.samsung@gmail.com>
Reviewed-by: Pawel Osciak <posciak@chromium.org>
Commit-Queue: Pawel Osciak <posciak@chromium.org>
Tested-by: Pawel Osciak <posciak@chromium.org>
ARM: dts: Add mask-tpm-reset to the device tree

The mask-tpm-reset GPIO is used by the kernel to prevent the TPM from
being reset across sleep/wake.  If we don't set it to anything then
the TPM will be reset.  U-Boot will soon be detecting this as invalid
and will reset the system on resume time.  This GPIO can always be low
and not hurt anything.  It will get pulled back high again during a
normal warm reset when it will default back to an input.

To properly preserve the TPM state across suspend/resume and to make
the future version of U-Boot happy, properly set the GPIO to mask the
reset to the TPM.

BUG=chrome-os-partner:20172
TEST=With new U-Boot 'suspend_stress_test' no longer reboots the
system.

Change-Id: Ie01e1578e136809577127695504109625c5a98f6
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58737
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Luigi Semenzato <semenzato@chromium.org>
ARM: gic: Fix possible irq lock inversion dependency

Lockdep detects that for irq_controller_lock an interrupt could create inverse
lock ordering. Since irq_controller_lock is taken in interrupt context,
disable interurpts when this lock is taken.

BUG=chrome-os-partner:19275
TEST=Booted peach, have not seen any more BUGs due to recursion on the
irq_controller_lock.

Change-Id: I503945d46431e46a197f4dd502b2a9662843f7d0
Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/57958