make.py: make a bit more generic

if parts of the soc are not available or not enables on a platform, do
not use their verilog cores.
spiflash: add read-only variable data width spi flash
tdcdtc: preliminary version of serdes based TDC+DTC wishbone peripheral
memtest: shrink memtest space to 63M for lx9 microboard
lx9crg: add crg for lx9 microboard
software/bios: temporarily disable crcbios()

fails if flash is not working
top.py, lm32_config.v, linker.ld: use static hardcoded rom for bios
remaining changes for lx9 microboard