Return the amount of data written when an error occurs rather than
the error.

The change lets the mrfs_fsrdwr test pass.
testsuites: Include missing header files
score: Move object MP content to public API
score: Move object content to public API
Updated legacy code in i386 pc386
doc/user/conf.t: More clean ups
smp: Use Thread_Control.is_executing

FIXME: This area needs proper locking.
smp: Add and use _Per_CPU_Get()

Add and use _Per_CPU_Get_by_index() and _Per_CPU_Get_index().  Add
_Per_CPU_Send_interrupt().  This avoids direct access of
_Per_CPU_Information.
score: New header file <rtems/score/assert.h>
score: Add _Assert_Thread_dispatching_repressed()
score: Add assert to _Per_CPU_Get()

Thread dispatching must be repressed to use the per CPU control of the
current processor consistently.
score: Critical section change in _Thread_Dispatch

If we enter _Thread_Dispatch() then _Thread_Dispatch_disable_level must
be zero.  Single processor RTEMS assumes that stores of non-zero values
to _Thread_Dispatch_disable_level are observed by interrupts as non-zero values.

Move the _Thread_Dispatch_set_disable_level( 1 ) out of the first ISR
disabled critical section.  In case interrupts happen between the
_Thread_Dispatch_set_disable_level( 1 ) and _ISR_Disable( level ) then
the interrupt will observe a non-zero _Thread_Dispatch_disable_level and
will not issue a _Thread_Dispatch() and we can enter the ISR disabled
section directly after interrupt processing.

This change leads to symmetry between the single processor and SMP
configuration.
smp: Delete _ISR_SMP_Initialize()
smp: Delete _ISR_Disable_on_this_core(), etc.

Delete _ISR_Enable_on_this_core(), _ISR_Flash_on_this_core(),
_ISR_SMP_Disable(), _ISR_SMP_Enable(), _ISR_SMP_Flash().

The ISR disable/enable interface has no parameter to pass a specific
object.  Thus it is only possible to implement a single global lock
object with this interface.  Using the ISR disable/enable as the giant
lock on SMP configurations is not feasible.

Potentially blocking resource obtain sequences protected by the thread
dispatch disable level are subdivided into smaller ISR disabled critical
sections.  This works since on single processor configurations there is
only one thread of execution that can block.  On SMP this is different
(image a mutex obtained concurrently by different threads on different
processors).

The thread dispatch disable level is currently used as the giant lock.
There is not need to complicate things with this unused interface.
smptests/smpsignal01: New test
smptests/smppsxsignal01: New test
score: Add and use _Thread_Signal_notification()
posix: Simplify pthread_kill()

Delete _Thread_Signal_notification() since this is a side-effect of
_POSIX_signals_Unblock_thread().
score: Move _Thread_Dispatch_if_necessary()

Rename to _RTEMS_Tasks_Dispatch_if_necessary().
smp: Delete _SMP_Request_other_cores_to_dispatch()

Use an event triggered unicast to inform remote processors about a
necessary thread dispatch instead.