OMAP PM: Use lower cpufreq transition latency for OMAP3630 < ES1.2

Several users with ES1.1 silicon complained that their devices started
failing to resume from sleep after 04ecc8b... ("Revert 'OMAP PM:
Optimize cpufreq transition latency'") landed in the nightlies.  While
this is almost certainly papering over a bug somewhere, go back to the
lower transition latency value for ES1.1 and older silicon for now.

Thanks to keyodi for suggesting this particular workaround and XDA user
samcoinc for testing.
ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep

Commit 4da71ae6 ("OMAP: clockdomain: Arch specific funcs for
clkdm_clk_enable/disable") called the OMAP2xxx-specific functions for
clockdomain wakeup and sleep.  This would probably have broken
software-supervised clockdomain wakeup and sleep on OMAP3.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
[steven@steven676.net: make apply to p-android-omap3-3.0]
lowmemorykiller: Compact memory when killing processes

* Memory compaction is never invoked on Android because we avoid swap
   and don't allocate huge pages. Fix it by invoking compaction from the LMK when
   a process is killed to reduce memory fragmentation.

Change-Id: I2bda790c2093e65fd6f43d52ea5149d6b57cb1e9

Conflicts:

	drivers/staging/android/lowmemorykiller.c
lowmemorykiller: Use asynchronous compaction

Change-Id: I6a65d06fc30b88fcedaaf1abf1855fdd19e3c912
OMAP3630+: SmartReflex : 1p5: add qos request

Since we do calibration sequences out of the DVFS path, we still
need to honor the requirement not to interrupt the hardware activities
by attempting lower power states untill calibration is complete.
Hence request a QoS while we have hardware calibration sequence
active and monitoring is in progress.

We currently have check for work->active and abort as part of trigger
sequence from omap4_enter_sleep function, however,
considering cpuidle path:
a) omap4_enter_sleep is called by cpuidle's omap4_enter_idle_primary
after the following steps:
  i) set the log state and set power domain state
  ii) WAIT for power domain state to transition!!!
  we then call omap4_enter_sleep
b) Now in omap4_enter_idle_secondary,
  GIC disabled, and we directly hit omap4_enter_lowpwer and goes down

We DONOT want these to take place while we are capturing a calibrated
voltage for the OPP.

Change-Id: I217d80b1ffcf7cbe80eea4ceb29363bd2d25178e
Reported-by: Shashi Shekar B.S. <shashi.shekar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
OMAP3+: Smartreflex: fix interrupt status clear write

ChangeId Ic0e3d9960ed9511769c3c25b2c71ff1e53bcc796
(OMAP3+: Smartreflex: Fix interrupt disable sequence)
intended to write the interrupt mask to status register
prior to disabling it, instead, we ended up writing 0
to the register, essentially leaving the interrupt status
not cleared. Fix this by splitting the interrupt disable
sequence out(v1 and v2 require different operation) and
ensure we write the correct value to interrupt status register.

Change-Id: Ib28352ff9ea4ec4b787aeee14a907e73080a6d12
Signed-off-by: Nishanth Menon <nm@ti.com>

Conflicts:

	arch/arm/mach-omap2/smartreflex.c
fix compile lmk
OMAP3630: add margins to SmartReflex-calculated voltages

Add 37500 uV to SmartReflex-calculated values for OPP1-3 and 62500 uV
for OPP4-5; this improves stability when SR is enabled on OMAP3630.

Details gleaned from commit 3df0d76... ("OMAP3:PM:SR add additional
steps for vdd1 OPP's for 3630SOM") on the p-android-omap-2.6.32 branch.
Revert "Set more correct formula for vsel, should be checked again in future, to prevent drain battery."

This reverts commit adb90daa969e81c958a79b998173babdeb503f58.

Conflicts:

	arch/arm/mach-omap2/pmic-cpcap.c