OMAP5: SR: support reading VC registers on ES2.0

ES2.0 currently displays 0 when omapconf show sr is invoked.
This is because of the register differences between ES1.0 and 2.0.

Handle that on the fly.

Signed-off-by: Nishanth Menon <nm@ti.com>
Merge pull request #14 from nmenon/o5-sr-vc-fix

OMAP5: SR: support reading VC registers on ES2.0
Makefile: allow to build tags and cscope

It is handy to have cscope and tags built from the sources to
account for any change in source without having to run special
scripts
So, add option to 'make tags' and 'make cscope' to generate
the references.

While at it, ignore these generated files from git tracking.

Note: we use -MM -MG options of gcc for this to work to ensure that
we can use the header dependency even for files that have not been
committed to git repository

[j-zheng@ti.com: update to keep in sync with latest code]
Signed-off-by: Jin Zheng <j-zheng@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Merge pull request #22 from jinzheng/makefile-cscope-tags

Makefile: allow to build tags and cscope
cpuinfo: OMAP5: fix cpu device type detection

OMAP5 ES2.0 has a different register compared to OMAP4 for
CONTROL_STATUS.

In addition, the bit range used to store the type of the device has also
been changed w.r.t OMAP4.

Current code reads from the wrong CONTROL register and wrong bits, as a
result of which CPU type is wrongly displayed. Update the code for the
same.

Signed-off-by: Jin Zheng <j-zheng@ti.com>
Merge pull request #24 from jinzheng/omap5_detect_device_type_fix

cpuinfo: OMAP5: fix cpu device type detection
CPUINFO: Array index matching

In original code, cpu_name, revision, type, performance information
arrays are initialized base upon the enum values in omap_chip and
omap_chip_revision.

As we keep adding new information, it will increase the mismatching
chances. Therefore, it will be handy if we initialize the arrays by
matching the values exactly to its corresponding indexes.

Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jin Zheng <j-zheng@ti.com>
Merge pull request #25 from jinzheng/array-index-match

CPUINFO: Array index matching
OMAP5: audit dpll should audit at the right OPP

Originally, when do omapconf-audit-dpll it will just audit DPLL
settings at current MPU OPP for 4 times, but not in 4 different OPPs.

Fix the same so that it will successfully audit DPLL settings in OPP
low, nom, high, and speedbin.

Signed-off-by: Jin Zheng <j-zheng@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
OMAP5: add show hwtemp

Provide a new functon reading the temperature from tagged bandgap
sensor's register instead of sysfs files. This is not currently
supported in OMAP4 devices or lower.

Signed-off-by: José Peña <pena@ti.com>
Signed-off-by: Jin Zheng <j-zheng@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
[DPLL] Extract DPLL_BYP_CLKSEL bit data for all DPLL types

As both DPLL types A and B has this DPLL_BYP_CLKSEL bit data, we
should extract this value for both types. The original code only does
it for type A.

Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jin Zheng <j-zheng@ti.com>
[PMIC] use array index matching for PMIC matches

In original code, the pmic_names and smps_names arrays
are initialized base upon the enum values in pmic_id and
pmic_smps_id.

As we keep adding new PMIC and voltage domains, it'll increase
the mismatching chances. Therefore, it'll be handy if we initialize
the arrays by matching the values exactly to its corresponding index.

Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jin Zheng <j-zheng@ti.com>
[MODULE] change debug print to print clock ID

The current code actually print the clock ID but claims it as the
clock frequency.

Changed the print message to indicate it is really clock ID.

Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jin Zheng <j-zheng@ti.com>
[OMAP5][DPLL] Fix show dpll M2 divider

The [1/2] divider located after the M2 post-divider is not valid when
the CM_CLKSEL_DPLL_MPU[22] DCC_EN bit is set (applies only to DPLL_MPU
when a frequency higher than 1.4 GHz is needed).

Therefore, when DCC is enable, it should print (x1) instead of (x2)
next to the M2 post-divider.

Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jin Zheng <j-zheng@ti.com>