tcg-arm: Use bic to implement and with constant

This greatly improves the code we can produce for deposit
without armv7 support.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Handle negated constant arguments to and/sub

This greatly improves code generation for addition of small
negative constants.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Allow constant first argument to sub

This allows the generation of RSB instructions.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Use tcg_out_dat_rIN for compares

This allows us to emit CMN instructions.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Handle constant arguments to add2/sub2

We get to re-use the _rIN and _rIK subroutines to handle the various
combinations of add vs sub.  Fold the << 21 into the opcode enum values
so that we can explicitly add TO_CPSR as desired.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Improve constant generation

Try fully rotated arguments to mov and mvn before trying movt
or full decomposition.  Begin decomposition with mvn when it
looks like it'll help.  Examples include

-:        mov   r9, #0x00000fa0
-:        orr   r9, r9, #0x000ee000
-:        orr   r9, r9, #0x0ff00000
-:        orr   r9, r9, #0xf0000000
+:        mvn   r9, #0x0000005f
+:        eor   r9, r9, #0x00011000

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Fold epilogue into INDEX_op_exit_tb

The epilogue on ARM is one pop instruction, that pops the return
address into PC.  Avoid the jump to jump for this case.  Use the
standard movi32 routine for loading the return value if it's easy.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Implement deposit for armv7

We have BFI and BFC available for implementing it.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Implement division instructions

An armv7 extension implements division, present on Cortex A15.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Use TCG_REG_TMP name for the tcg temporary

Don't hard-code R8.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Use R12 for the tcg temporary

R12 is call clobbered, while R8 is call saved.  This change
gives tcg one more call saved register for real data.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Cleanup multiply subroutines

Make the code more readable by only having one copy of the magic
numbers, swapping registers as needed prior to that.  Speed the
compiler by not applying the rd == rn avoidance for v6 or later.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Cleanup tcg_out_goto_label

Since we folded the epilogue into exit_tb directly, we no longer
have a long direct branch.  Fold tcg_out_goto into its only user,
eliminate the long branch case.  Drop the long forward branch
case for tcg_out_goto_label.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Cleanup goto_tb handling

Eliminate 2 disabled code blocks.  Choose the load-to-pc method of
jumping so that we can eliminate the 16M code_gen_buffer limitation.
Remove a test in the indirect jump method that is always true.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Cleanup most primitive load store subroutines

Use even more primitive helper functions to avoid lots of duplicated code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Fix local stack frame

We were not allocating TCG_STATIC_CALL_ARGS_SIZE, so this meant that
any helper with more than 4 arguments would clobber the saved regs.
Realizing that we're supposed to have this memory pre-allocated means
we can clean up the tcg_out_arg functions, which were trying to do
more stack allocation.

Allocate stack memory for the TCG temporaries while we're at it.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Split out tcg_out_tlb_read

Share code between qemu_ld and qemu_st to process the tlb.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Improve scheduling of tcg_out_tlb_read

The schedule was fully serial, with no possibility for dual issue.
The old schedule had a minimal issue of 7 cycles; the new schedule
has a minimal issue of 5 cycles.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Use movi32 + blx for calls on v7

Work better with branch predition when we have movw+movt,
as the size of the code is the same.  Perhaps re-evaluate
when we have a proper constant pool.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Convert to CONFIG_QEMU_LDST_OPTIMIZATION

Move the slow path out of line, as the TODO's mention.
This allows the fast path to be unconditional, which can
speed up the fast path as well, depending on the core.

Signed-off-by: Richard Henderson <rth@twiddle.net>