AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions.
E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196208 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64]Add missing floating point convert, round and misc intrinsics.
E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196210 91177308-0d34-0410-b5e6-96231b3b80d8