Dump LIS before regalloc. MI sched changes them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187107 91177308-0d34-0410-b5e6-96231b3b80d8
RegPressure: Order the "pressure sets" by number of regunits per set.

This lets heuristics easily pick the most important set to follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187108 91177308-0d34-0410-b5e6-96231b3b80d8
MI Sched: track register pressure by importance of the set, not weight of the units.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187109 91177308-0d34-0410-b5e6-96231b3b80d8
MI Sched: Register pressure heuristics.

Consider which set is being increased or decreased before comparing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187110 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Add STOC and STOCG

These instructions are allowed to trap even if the condition is false,
so for now they are only used for "*ptr = (cond ? x : *ptr)"-style
constructs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187111 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Add LOC and LOCG

As with the stores, these instructions can trap when the condition is false,
so they are only used for things like (cond ? x : *ptr).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187112 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Add LOCR and LOCGR



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187113 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Rework compare and branch support

Before the patch we took advantage of the fact that the compare and
branch are glued together in the selection DAG and fused them together
(where possible) while emitting them.  This seemed to work well in practice.
However, fusing the compare so early makes it harder to remove redundant
compares in cases where CC already has a suitable value.  This patch
therefore uses the peephole analyzeCompare/optimizeCompareInstr pair of
functions instead.

No behavioral change intended, but it paves the way for a later patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187116 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a comment cut-&-pasto.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187117 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a bug in TableGen where the intrinsic function name recognizer could mis-identify names if one was a prefix substring of the other

For two intrinsics 'llvm.nvvm.texsurf.handle' and 'llvm.nvvm.texsurf.handle.internal',
TableGen was emitting matching code like:

  if (Name.startswith("llvm.nvvm.texsurf.handle")) ...
  if (Name.startswith("llvm.nvvm.texsurf.handle.internal")) ...

We can never match "llvm.nvvm.texsurf.handle.internal" here because it will
always be erroneously matched by the first condition.

The fix is to sort the intrinsic names and emit them in reverse order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187119 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64: don't mask off shift bits when processing JIT relocations.

This should actually make the MCJIT tests pass again on AArch64. I don't know
how I missed their failure before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187120 91177308-0d34-0410-b5e6-96231b3b80d8
Don't end a file name with a dot. It looks odd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187124 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64: fix even more JIT failures

The last patch corrected some issues, but constant-pool entries had actual
codegen bugs in the large memory model (which MCJIT uses).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187126 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64: add llc-based tests for previous commit.

Better to have tests run even on non-AArch64 platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187128 91177308-0d34-0410-b5e6-96231b3b80d8
Current batch of -disable-debug-info-verifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187130 91177308-0d34-0410-b5e6-96231b3b80d8
typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187135 91177308-0d34-0410-b5e6-96231b3b80d8
Add a way to add a kind-value string pair to an attribute.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187138 91177308-0d34-0410-b5e6-96231b3b80d8
Allocate local registers in order for optimal coloring.

Also avoid locals evicting locals just because they want a cheaper register.

Problem: MI Sched knows exactly how many registers we have and assumes
they can be colored. In cases where we have large blocks, usually from
unrolled loops, greedy coloring fails. This is a source of
"regressions" from the MI Scheduler on x86. I noticed this issue on
x86 where we have long chains of two-address defs in the same live
range. It's easy to see this in matrix multiplication benchmarks like
IRSmk and even the unit test misched-matmul.ll.

A fundamental difference between the LLVM register allocator and
conventional graph coloring is that in our model a live range can't
discover its neighbors, it can only verify its neighbors. That's why
we initially went for greedy coloring and added eviction to deal with
the hard cases. However, for singly defined and two-address live
ranges, we can optimally color without visiting neighbors simply by
processing the live ranges in instruction order.

Other beneficial side effects:

It is much easier to understand and debug regalloc for large blocks
when the live ranges are allocated in order. Yes, global allocation is
still very confusing, but it's nice to be able to comprehend what
happened locally.

Heuristics could be added to bias register assignment based on
instruction locality (think late register pairing, banks...).

Intuituvely this will make some test cases that are on the threshold
of register pressure more stable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187139 91177308-0d34-0410-b5e6-96231b3b80d8
Evict local live ranges if they can be reassigned.

The previous change to local live range allocation also suppressed
eviction of local ranges. In rare cases, this could result in more
expensive register choices. This commit actually revives a feature
that I added long ago: check if live ranges can be reassigned before
eviction. But now it only happens in rare cases of evicting a local
live range because another local live range wants a cheaper register.

The benefit is improved code size for some benchmarks on x86 and armv7.

I measured no significant compile time increase and performance
changes are noise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187140 91177308-0d34-0410-b5e6-96231b3b80d8
RegAllocGreedy comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187141 91177308-0d34-0410-b5e6-96231b3b80d8