r600g: add new richland pci ids

Note: this is a candidate for the stable branches.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
radeonsi: add new SI pci ids

Note: this is a candidate for the 9.1 branch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
i965: Avoid recompiles for fragment clamping on non-clamping APIs.

Removes 75/78 state-dependent recompiles in GLB2.7 (the remaining 3 are
due to FBO-rendering size predictions).  We currently expose
GL_ARB_color_buffer_float on GL core, so we may mis-predict there, but I'm
about to send a patch for removing that silly extension in that case.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
freedreno: don't patch and re-emit same shader as much

New textures or vertex buffers don't always require patching and
re-emitting the shaders.  So do a better job of figuring out when we
actually have to patch the shader.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
freedreno: use writecombine buffers

Better than uncached for writes, which are common for vertex buffer
upload, etc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
linux: Don't emit a .note.ABI-tag section anymore (#26663)

We don't support pre-2.6 kernels anyway - the install docs say 2.6.28
for DRI - and apparently this confuses ld.so's sorting when multiple
libGLs are installed.  Just remove it.

Note: this is a candidate for the stable branches.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Adam Jackson <ajax@redhat.com>
r600g/compute: Fix input buffer size calculation

Buffer size should be in bytes not dwords.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
r600g/compute: Don't use radeon_winsys::buffer_wait() after dispatching a kernel

The state tracker should be responsible for waiting for the kernel to
finish.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
r600g: Add evergreen_emit_cs_constant_buffers() v2

v2:
  - Bump R600_NUM_ATOMS

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
r600g/compute: Use a constant buffer to store kernel parameters v2

v2:
  - Fix usage of set_constant_buffer()
  - Fix typo in comment

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
r600g/compute: Removed unused and untested code

There was a lot of code in evergreen_compute_internal.c that was not
being used at all and most of it was duplicating code from other parts
of the driver.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
winsys/radeon: consolidate tracing into winsys v2

This move the tracing timeout and printing into winsys and add
an debug environement variable for it (R600_DEBUG=trace_cs).

Lot of file touched because of winsys API changes.

v2: Do not write lockup file if ib uniq id does not match last one

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
i965/vs: Add a function to fix-up uniform arguments for 3-src insts.

Three-source instructions have a vertical stride overloaded to 4, which
prevents directly using vec4 uniforms as arguments. Instead we need to
insert a MOV instruction to do the replication for the three-source
instruction.

With this in place, we can use three-source instructions in the vertex
shader. While some thought needs to go into deciding whether its better
to use a three-source instruction rather than a sequence of equivalent
instructions (when one or more sources are uniforms or immediates), this
will allow us to skip a lot of ugly lowering code and use the BFE and
BFI2 instructions directly.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
i965/vs: Add support for LRP instruction.

Only 13 affected programs in shader-db, but they were all helped.

total instructions in shared programs: 368877 -> 368851 (-0.01%)
instructions in affected programs:     1576 -> 1550 (-1.65%)

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
gallivm: Fix trivial out-of-bounds indirection in lp_build_cube_lookup().

Courtesy of clang:

  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1483:10: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds]
           tmp[2] = lp_build_swizzle_aos(coord_bld, ddx_ddy[1], swizzle02);
           ^   ~
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here
           LLVMValueRef ddx_ddy[2], tmp[2], rho_vec;
           ^
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1487:56: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds]
              rho_vec = lp_build_add(coord_bld, rho_vec, tmp[2]);
                                                       ^   ~
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here
           LLVMValueRef ddx_ddy[2], tmp[2], rho_vec;
           ^
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1491:56: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds]
              rho_vec = lp_build_max(coord_bld, rho_vec, tmp[2]);
                                                       ^   ~
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here
           LLVMValueRef ddx_ddy[2], tmp[2], rho_vec;
           ^
winsys/intel: new winsys for intel

This is a wrapper for libdrm_intel to allow the pipe driver to stay OS
agnostic.
ilo: new pipe driver for Intel GEN6+

This commit adds some boilerplate code.  The header files found under include/
are copied from i965.
ilo: add debug flags settable through ILO_DEBUG
ilo: hook up pipe_screen param and fence functions
ilo: hook up pipe screen format functions