Fix PR16807

- Lower signed division by constant powers-of-2 to target-independent
  DAG operators instead of target-dependent ones to support them better
  on targets where vector types are legal but shift operators on that
  types are illegal. E.g., on AVX, PSRAW is only available on <8 x i16>
  though <16 x i16> is a legal type.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192721 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR17546

- Type of index used in extract_vector_elt or insert_vector_elt supposes
  to be TLI.getVectorIdxTy() which is pointer type on most targets. It'd
  better to truncate (or zero-extend in case it's changed later) it to
  mask element type to guarantee they are matching instead of asserting
  that.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192722 91177308-0d34-0410-b5e6-96231b3b80d8
Struct byval: fix a copy-paste error for thumb2.

PR17309


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192730 91177308-0d34-0410-b5e6-96231b3b80d8
Remove some dead code. (DarwinGDBCompat was retired in r189903).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192731 91177308-0d34-0410-b5e6-96231b3b80d8
Fixing some host==target assumptions in RuntimeDyld

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192732 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Add support for NEON scalar signed saturating absolute value and
scalar signed saturating negate instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192733 91177308-0d34-0410-b5e6-96231b3b80d8
Reformat.

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Separating ELF and MachO stub info functions for RuntimeDyld

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192737 91177308-0d34-0410-b5e6-96231b3b80d8
Path: Recognize Windows compiled resource file.

Some background: One can pass compiled resource files (.res files) directly
to the linker on Windows. If a resource file is given, the linker will run
"cvtres" command in background to convert the resource file to a COFF file
to link it.

What I'm trying to do with this patch is to make the linker to recognize
the resource file by file magic, so that it can run cvtres command.

Differential Revision: http://llvm-reviews.chandlerc.com/D1943

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192742 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Remove some leftover MI dump call

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192743 91177308-0d34-0410-b5e6-96231b3b80d8
Use ASSERT_EQ rather than ASSERT_TRUE for better unit test failures.

Also minor using namespace move so it's not hard-up against the function
definition and outside the namespace as is usual.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192744 91177308-0d34-0410-b5e6-96231b3b80d8
Support/FileSystem.h: Remove a trailing comma in enum file_magic::Impl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192745 91177308-0d34-0410-b5e6-96231b3b80d8
Clean up, formatting, comments. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192747 91177308-0d34-0410-b5e6-96231b3b80d8
Add an assert that we have a scope that matters for methods
and remove a call to getNonCompileUnitScope as a method
shouldn't be in the compile unit scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192748 91177308-0d34-0410-b5e6-96231b3b80d8
Make sure we're not attempting to construct a subprogram DIE
twice and just look up the value. Fix the one case where
we were trying to create a subprogram DIE and we should already
have had one. Reflow formatting in collectDeadVariables while fixing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192749 91177308-0d34-0410-b5e6-96231b3b80d8
Enable MI Sched for x86.

This changes the SelectionDAG scheduling preference to source
order. Soon, the SelectionDAG scheduler can be bypassed saving
a nice chunk of compile time.

Performance differences that result from this change are often a
consequence of register coalescing. The register coalescer is far from
perfect. Bugs can be filed for deficiencies.

On x86 SandyBridge/Haswell, the source order schedule is often
preserved, particularly for small blocks.

Register pressure is generally improved over the SD scheduler's ILP
mode. However, we are still able to handle large blocks that require
latency hiding, unlike the SD scheduler's BURR mode. MI scheduler also
attempts to discover the critical path in single-block loops and
adjust heuristics accordingly.

The MI scheduler relies on the new machine model. This is currently
unimplemented for AVX, so we may not be generating the best code yet.

Unit tests are updated so they don't depend on SD scheduling heuristics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192750 91177308-0d34-0410-b5e6-96231b3b80d8
Fix missing C++ mode thing in header

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Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192752 91177308-0d34-0410-b5e6-96231b3b80d8
Adding support for deregistering EH frames with MCJIT.

Patch by Yaron Keren



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192753 91177308-0d34-0410-b5e6-96231b3b80d8
Adding padding to the .eh_frame section in RuntimeDyld

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192754 91177308-0d34-0410-b5e6-96231b3b80d8