Add detection of VFP v3 variants to mono-hwcap-arm.
Adjust various FP register values for hard float in mini-arm.h.
Add a helper function to the ARM back end to determine hard float mode.
Support VFP v3 variants of ARM_FLDMD and ARM_FSTMD.

Previously, we set the D bit of these instructions to Fd & 1. This
was incorrect. The D bit should only be set if we're referring to
the extra double-precision registers in VFP v3.

Take for example the instruction:

    vstmia r0, {d18-d20}

This is encoded by the GNU assembler to:

    1110 110 0 1 1 0 0 0000 0010 1011 00000110
                 |          |
                 D          Vd

The Vd is set to 2, i.e. register d2. However, we want to refer to
the d18 register, which is why the D bit is set. The CPU concats
the D bit with the four Vd bits to get 0b10010, which is 18.

However, if we do:

    vstmia r0, {d2-d4}

We get:

    1110 110 0 1 0 0 0 0000 0010 1011 00000110
                 |          |
                 D          Vd

The only difference is that the D bit is not set. This is because
the four Vd bits are enough to refer to the 16 base double-precision
registers in VFP.
Add VFP register saving to trampolines.
Handle the MONO_ARM_FPU_VFP_HARD case in mono_arch_emit_setret ().
Implement return value passing for ARM hard float.

This is currently only for float32/float64 values. They are passed
in the d0 register. The code is a bit complicated because we only
speak float64 in the JIT, so float32 values have to be converted
to/from float64.
Print detected ARM version in configure.
Implement add_float () for hard float on ARM.
Add register assignment for double-precision args on ARM hard float.
Make sure FPRs aren't used for implicit arguments on ARM hard float.
armhf single-precision args