PM / AVS: SmartReflex: update class registration

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: class3 - add class name to allow proper registration

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: fix interrupt disable sequence

With the current interrupt disable sequence, we disable IRQENABLE
followed by clearing of IRQSTATUS. With this sequence, we see, at
times CORE domain does not hit OFF mode during cold boot because
SR modules(Core/IVA/MPU domains) are stuck 'in transition'. This
is due to IP Generic behavior around how swakeup is controlled
towards PRCM.

The right sequence we have is write to IRQSTATUS register
to clear the interrupt, then write to IRQENABLE_CLR register to
disable the interrupt to ensure that no pending interrupts exist
in the system on disable of SmartReflex AVS block.

Reported-by: Honda Kenji <x0092217@ti.com>
Reported-by: Maki Tanaka <m-tanaka1@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: disable spamming interrupts

At times with bad SR configurations, especially during silicon bring-ups,
we could get continuous spurious interrupts which end up hanging the
platform in the form of an ISR call for status bits that are
automatically enabled by the hardware without any software clearing
option.

If we detect scenarios where ISR was called without the corresponding
notification bit being set, instead of hanging up the system,
we will disable interrupt after noting the event in the system log
to try and keep system sanity and allow developer to debug and fix
the condition.

The same condition applies when a notifier does not exist OR is unable
to handle the interrupt as well.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: introduce notifiers flags

SmartReflex IP V1 and V2 have different registers and offsets.
Currently, we pass the status as is to the class driver. However,
since we don't pass the version of the underlying SR hardware
to the Class driver, it will not be unable to make consistent
sense of the status bits coming over to it.

A class driver should be able to function without dependency
on the exact IP version it is actually running on. We hence
introduce our own translation in software level for a generic
notification flag.

As part of this change, we will now call the notifier iff we get
a match with the notifier flags that the class driver requested.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: introduce notifier_control

We need some mechanism from class drivers to control when notifiers
should be triggered and when not, currently we have none, which makes
Class driver usage of the interrupt events almost impossible.

We also ensure that disable/enable or irq is always guarenteed to be
paired. The need to do this is because of the mixture of interrupt based
and polling based operations that is implemented as the most optimal
strategy for various SmartReflex AVS class

Introduce an SmartReflex driver API for doing the same. This is useful
for SmartReflex AVS class 1.5 or 2 drivers.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: introduce class init,deinit and priv data

Certain class drivers such as class 1.5 drivers, will need specific
notification that they have to be inited up or deinited independent
of smart reflex operation. They also may need private data to be
used for operations of their own, provide the same.
This allows the class driver to initialize it's internal data structures
on a need basis in preparation for the specific domain's autocomp usage.
The resultant operation is as follows:
when autocomp is set to 1 -> class drivers' init is called
The existing enable/disable is still used as before by the SmartReflex
core driver to enable disable the class operation.
When autocomp is set to 0 -> class drivers' deinit is called, signaling
the end of usage for that domain.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: add supply regulator for voltage control

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: class3: start using supplier enable / disable API

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
ARM: dts: OMAP4430: add device node for AVS

Patch adds AVS device node definition for MPU voltagedomain
and corresponding bindings to kernel documentation.

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: merge class 1.5

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: make class 1.5 compilable

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
Merge remote-tracking branch 'github_nm/devel/vc-vp-regulator-rfc' into ti_avs_next_step_draft_v03
PM / AVS: PMIC: add enable / disable support

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
HACK: PM / AVS: enable VC VP for omap4-sdp

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
HACK: PM / AVS: link mpu AVS with PMIC

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
PM / AVS: SmartReflex: retrieve voltage from NVALUE table

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>