Add support for interbyte delay in SPI transfers

Some SPI slave devices require a delay between each byte of an SPI transfer so that the slave has time to save/load the data.  This is common for slave devices that do not support DMA such as other small MCU's.

The A10/A13 devices have a mechanism to easily do this, there is a function in spi_sunxi.c that sets it up (aw_spi_set_waitclk_cnt), but no mechanism is provided to call this function.

This patch addresses this shortcoming by adding an extra field to struct spi_ioc_transfer.

Here is an example of how to include interbyte delays in an SPI transfer:

struct spi_ioc_transfer tr[2];

memset(tr, 0, sizeof tr);

tr[0].tx_buf = (unsigned long)tx;
tr[0].len = 1;
tr[0].delay_usecs = 10;

tr[1].rx_buf = (unsigned long)rx;
tr[1].len = 2;
tr[1].interbyte_usecs = 5;

if ((ret = ioctl(fd, SPI_IOC_MESSAGE(2), tr)) == -1)
{
	ERRMSG("Lacrosse: can't send spi message");
	return -2;
}

Signed-off-by: Simon Ratcliffe simon@proatomic.com.au
sunxi: Make avs compile.

Functionality not tested.

Signed-off-by: Michal Suchanek <hramrach@gmail.com>