tic6x - bnop pcrel & header based fetch packet : test-case

Add a test-case for bnop instruction within compact instruction
header based packets.

Within header based packet, the pcrel is shifted left by one whereas
outside, it's shifted left by two. This is so to enable a jump
to a 16bits instruction (even if the jump instruction itself is
is encoded with 32 bits format).

Other branch instructions doesn't have this feature as bnop is
specifically a C64x instruction and only C64X DSP and above
have header based fetch packets.

See SPRUFE8B p. 167 where this case is detailed.
tic6x - bnop pcrel & header based fetch packet : fix

bnop displacement should be shifted left by 1 within compact instruction
packets (instead of 2 in non-header-based packets). See SPRUFE8B p. 167.

The infrastructure was already in place but the corresponding 32bit bnop
opcode incorrectly used 'pcrel' instead of 'pcrel_half' one.

This has been verified by disassembling working code and checking disassembly
output.

Fixes the test-case introduced by the preceding commit.