MI-Sched: Adjust regpressure limits for reserved regs.

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MI-Sched: cleanup DEBUG output.

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Fix IMULX machine model. Multiple def operands require multiple SchedWrites.

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Make rematerialization in the coalescer less sensitive to LRG order.

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Modify the -join-globalcopies option (off by default).

Always coalesce in forward order to propagate rematerialization.
I'm fixing this option so I can enable it by default soon.

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Fix a -join-globalcopies bug; handle undef operands.

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whitespace

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Refactor LiveRangeEdit::eliminateDeadDefs.

I want to add logic to handle more cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184571 91177308-0d34-0410-b5e6-96231b3b80d8
Handle more cases in LiveRangeEdit::eliminateDeadDefs.

Live intervals for dead physregs may be created during coalescing. We
need to update these in the event that their instruction goes away.

crash.ll is the unit test that catches it when MI sched is enabled on
X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184572 91177308-0d34-0410-b5e6-96231b3b80d8
Added -precompute-phys-liveness for testing LiveIntervals updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184573 91177308-0d34-0410-b5e6-96231b3b80d8
Update physreg live intervals during remat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184574 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR16360

When (srl (anyextend x), c) is folded into (anyextend (srl x, c)), the
high bits are not cleared. Add 'and' to clear off them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184575 91177308-0d34-0410-b5e6-96231b3b80d8
Add missing REQUIRES: asserts in crash.ll.

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[NVPTX] Add support for selecting CUDA vs OCL mode based on triple

IR for CUDA should use "nvptx[64]-nvidia-cuda", and IR for NV OpenCL should use "nvptx[64]-nvidia-nvcl"

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[objcarcopts] Encapsulate PtrState.RRI.CFGHazardAfflicted via methods PtrState.{IsCFGHazardAfflicted,SetCFGHazardAfflicted}.

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[objcarcopts] Encapsulated PtrState.RRI.IsTrackingImpreciseRelease() => PtrState.IsTrackingImpreciseRelease().

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BlockFrequency: Saturate at 1 instead of 0 when multiplying a frequency with a branch probability.

Zero is used by BlockFrequencyInfo as a special "don't know" value. It also
causes a sink for frequencies as you can't ever get off a zero frequency with
more multiplies.

This recovers a 10% regression on MultiSource/Benchmarks/7zip. A zero frequency
was propagated into an inner loop causing excessive spilling.

PR16402.

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[objc-arc-opts] Encapsulated PtrState.RRI.{Calls,ReverseInsertPts} into several methods on PtrState.

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[objc-arc-opts] Now that PtrState.RRI is encapsulated in PtrState, make PtrState.RRI private and delete the TODO.

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Revert "BlockFrequency: Saturate at 1 instead of 0 when multiplying a frequency with a branch probability."

This reverts commit r184584. Breaks PPC selfhost.

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