Pushing in Gary's sysmem changes into 2013.01 latest U-boot branch after merging and confirming it builds

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Added PLL initialization support.  There are issues with
the UART after PLL init completes, but the PLLs seem solid
(locked).

Signed-off-by: John Jacques <john.jacques@lsi.com>
Merge branch 'lsi-v2013.01.01' of github.com:lsigithub/lsi_axxia_uboot into SR_lsi-v2013.01.01-sysmem
Leave the peripheral clock on reference (125 MHz).

Signed-off-by: John Jacques <john.jacques@lsi.com>
Merge branch 'lsi-v2013.01.01' of github.com:lsigithub/lsi_axxia_uboot into SR_lsi-v2013.01.01-sysmem
Fix acp_clock_get for clock_core.

Signed-off-by: John Jacques <john.jacques@lsi.com>
Remove debug code.

Signed-off-by: John Jacques <john.jacques@lsi.com>
Updated SPL U-boot sysmem code to match latest sysmem RTE code for AXM5500. There are still some DDR3 MBIST failures that are being investigated
Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Updated ncr code for elm modes 0x158 and 0x159

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Merge branch 'lsi-v2013.01.01' of github.com:lsigithub/lsi_axxia_uboot into SR_lsi-v2013.01.01-sysmem
Checking in sysmem init changes for AXM5500 to address aliasing issue

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Updated pcie workaround to accomodate second SERDES core and some SERDES setting changes

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Commented out fill sysmem routine for now

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Checking in correct CLK OFFSET/PERIOD for MDIO for AXM55xx

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Checking in correct PHY offset for FEMAC

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Use the correct counter frequency!

Signed-off-by: John Jacques <john.jacques@lsi.com>
Checking in latest sysmem init changes for AXM55xx bringup

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Added support to BCM5222 phy used on AXM5500 Amarillo board and using the correct 0x1E phy address

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
The special accesses (0x155, 0x156 etc.) were only being
handled in ncr_read32/ncr_write32 (and the 16 bit versions), not
in ncr_poll.  They have to be handled in all cases!  This commit
does that.

Signed-off-by: John Jacques <john.jacques@lsi.com>
Merge branch 'SR_lsi-v2013.01.01-sysmem' of github.com:lsigithub/lsi_axxia_uboot into SR_lsi-v2013.01.01-sysmem