Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
The end goal will be also merging of disasm and cpu decoder to one module and remove the disasm.

Two bug fixes on the way:
TBM: fixed 64-bit TBM instructions with memory access (did 32-bit load instead of 64-bit)
BMI2: fixed operands order for PEXT/PDEP instructions
AVX2: fixed gather instruction decoding bug from decoder alias commit


git-svn-id: svn://svn.code.sf.net/p/bochs/code/trunk@11831 6c8e4198-a580-4521-a02f-c9ae86df1db9