ARM i.MX31 pcm037: rewrite lowlevel init code in C

Tested with NOR and NAND boot.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX31 pcm037: Switch to new environment

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX31: sync iomux with kernel

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX31 pcm037: add more iomux pins

Use imx_iomux_setup_multiple_pins to setup the pinmux and add more
pins.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX31: Add mmc register convenience functions

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX31 pcm037: add mmc support

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
USB ehci: Allow to register independently from device

The EHCI core often is part of a otg core. Allow it to be registered
separately from another driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
USB i.MX: Add chipidea driver support

For proper USB function the usbmisc registers have to be initialized.
This patch adds a driver which matches for the usbmisc registers. This
driver is called from a new driver which binds to the USB ports to
configure the misc registers. After that the driver registers the EHCI
driver and an ULPI transceiver if necessary. Currently only host mode
is supported, but device support can be added later.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX27: Add USB device functions

Register the USB misc devices and provide convenience wrappers to
register the USB ports for i.MX27.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX51: Add USB device functions

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX31: Add USB device functions

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX pcm038: switch to chipidea support

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
pcm038: Stop ongoing ULPI transfers before registering the transceiver

The ULPI lines are normally input to the USB port. In order to configure
the ULPI transceiver properly the ongoing transfers must be stopped. This
can be done by configuring the the STP pin as gpio output and drinving
it high.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM i.MX pcm038: Update defconfig for chipidea driver

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MIPS: add pre-bootloader (pbl) image support

This patch is based on ARM pbl support and allows
creating a pre-bootloader binary for compressed image.

For different MIPS SoCs (or even for different boards based
 on the same SoC) the operations carried on in start-pbl.S
can be very different. The additional constraints can be imposed
on the size of the boot code or the special magic labels in
the beginning of the boot code; In some cases it could be
necessary to show CPU is alive as early as possible
(transmit a char via UART or blink a LED).
So the demands for pbl start operation can be very different.

E.g. malta board store boot code at the NOR flash mapped
to the MIPS power-on address (0xbfc00000); it is the most
simple case: we need just copy pbl image from direct-mapped
flash to RAM and jump there.

The XBurst-powered boards store boot code in the beginning
of a NAND flash or in the beginning of SD/MMC card.
In this case we must use simple and short NAND or SD/MMC access
routines to copy pbl image to RAM.

To meet so different demands a simple technique is selected:

* MIPS pbl entry point located in file arch/mips/boot/start-pbl.S.

* MIPS pbl code (see start-pbl.S) assumes that every pbl-enabled
board has a arch/mips/boards/<BOARD>/include/board/board_pbl_start.h
header file. This file must contain definition of
the board_pbl_start macro. This macro is used as start of pbl image;

* the most popular asm routines (stack setup, relocation to link
address, NS16550 initialization (WIP) and so on) are containt
in the arch/mips/include/asm/pbl_macros.h header file.
So board pbl macro can use it if necessary.
It is possible to create similar headers with macros for each
specific SoC; so even if we have many different boards based
on the same SoC the board_pbl_start macro for every board
can be short and clear.

* after board-specific initialization the stack pointer
is initialized and pbl C code is started.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MIPS: qemu-malta: add trivial pbl support

Trivial pbl support has no cpu specific setup.
We will add cache setup routines in the future.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MIPS: qemu-malta_defconfig: use pbl

USAGE

 $ make qemu-malta_defconfig
   ...
 $ make
   ...
 $ qemu-system-mips -nodefaults -M malta -m 256 \
           -nographic -serial stdio -bios ./barebox-flash-image

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: cfa10036: Add the AT24HC02 I2C EEPROM

This EEPROM is found on the expansion boards available for the 10036
module. Since we won't need to do anything fancy except reading/writing
from it, use bitbanging to communicate with it.

This EEPROM will hold mostly the board_id so that we can determine if
there is an expansion board plugged in and what expansion board it is.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: cfa10036: Retrieve the board variant from the AT24

The AT24 found on the expansion boards store the variant of the board it
is soldered onto.

That means that we are that way able to determine what expansion board
is currently plugged in if any. If we can't communicate with the EEPROM,
we just assume that only the CFA-10036 is there.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
ARM: cfa10036: Use the board variant to load a different device tree

The board variant found on the AT24 EEPROM holds the variant ID that we
can use to identify which expansion board we are running on and thus
which device tree to load and pass to the kernel.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>