ports: gcc: cortex-m4: Add LM4F support in os/ports/GCC/ARMCMx.
platforms: lm4f: Add LM4F120H5QR.h from cmsis
stellaris: lm4f: Add hal_lld.[hc]
stellaris: lm4f: Add pal_lld.[hc]
stellaris: lm4f: Add serial.[hc]
platforms: lm4f: Add platform make file for Stellaris-launchpad.
stellaris: board: Add Stellaris-launchpad board files.
stellaris: lm4f: gpio: PF0 needs special initialization sequence
platforms: lm4f: GPIO commit register(CR) should be writable

The commit register needs to be writable in order to be
able to make changes to protected pins PD7, PF0 (NMI)
PC[3:0] (JTAG/SWD).

Before writing to this register the access to it should
be unlocked by writing special value to LOCK register.
After unlocking and writing 1 to corresponding bits in CR
AFSEL, PUR, PDR, DEN bits can be written.
stellaris: demo: Add Stellaris-launcpad demo.
stellaris: lm4f: Add spi_lld.[hc]

Conflicts:
	os/hal/platforms/LM4F/lm4f120.h
stellaris: platform: Enable to build SPI driver.
stellaris: lm4f: pal: Let GPIOA port be initialized
stellaris: board: Define SPI0 selection pin
stellaris: demo: Demo application for spi

Demo to check SSI. After pressing on SW1, board will wait
for a byte from uart0. When received, it will send it to
tx(PA5) on SSI0, and will read rx(PA4) back. Then the byte
from SSI0 receive buffer will be sent back to uart0.

PA4 and PA5 should be connected.
stellaris: demo: use chprintf instead of sdWrite