radeonsi: Only scan pixel shaders for TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS

It's not relevant for other shader types.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Use line number information from entire function expression

This patch changes the error reporting behavior for incorrect function
invocation (triggered by match_function_by_name() unable to find a
matching function call) from using the line number information
associated to the function name term to using the line number
information of the entire function expression. Fixes bug #72264.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72264
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Report that no function found if signature lookup is empty

If no function signature is found for a function name, report that the
function is not found instead of printing an empty list of candidates.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
i965: Delete bogus BRW_REGISTER_TYPE_HF define.

git blame ascribes this to the initial commit of the driver.

No released hardware has ever supported half float, according to the
documentation for SrcType in the ISA reference.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965: Zero out {point_sprite,flat}_enables in calculate_attr_overrides.

calculate_attr_overrides is responsible for computing the point sprite
and flat-shading enable bitfields.  It does so by OR'ing in a bunch of
bits.  However, it relied on the caller to set the initial value to
zero.  This is pretty fragile - if the caller neglects to zero out those
variables, then the enable bitfields end up full of garbage, which shows
up as random things being flat-shaded.

This patch moves the zero-initialization into calculate_attr_overrides,
so that the computation is completely in one place.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
i965: Use {point_sprite,flat}_enable variable names instead of dw*.

Calling the local variables flat_enable and point_sprite_enable is
clearer than dw16 and such.  It also matches the names used in
calculate_attr_overrides, which computes them.

v2: Add /* dw16 */ and /* dw10 */ comments, requested by Jordan.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
i965: Fix 3DSTATE_PUSH_CONSTANT_ALLOC_PS packet creation.

When adding geometry shader support, we accidentally reversed the size
and offset parameters.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
i965: Add missing BRW_REGISTER_TYPE_UV.

Sandybridge added support for packed unsigned vectors.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
i965: Disassemble UV types, not UB types.

UB types have never been supported as immediates.  On Gen4-5, register
encoding 4 is "Reserved."  On Gen6+, it means UV.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
i965: Decode three-source register types directly.

Three-source instructions use a different encoding for register types
(and have a much more limited set to choose from).

Previously, we translated those into BRW_REGISTER_TYPE_* values, then
reused the existing reg_encoding mapping.

Doing it directly is more straightforward and actually less code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
i965: Abstract BRW_REGISTER_TYPE_* into an enum with unique values.

On released hardware, values 4-6 are overloaded.  For normal registers,
they mean UB/B/DF.  But for immediates, they mean UV/VF/V.

Previously, we just created #defines for each name, reusing the same
value.  This meant we could directly splat the brw_reg::type field into
the assembly encoding, which was fairly nice, and worked well.

Unfortunately, Broadwell makes this infeasible: the HF and DF types are
represented as different numeric values depending on whether the
source register is an immediate or not.

To preserve sanity, I decided to simply convert BRW_REGISTER_TYPE_* to
an abstract enum that has a unique value for each register type, and
write translation functions.  One nice benefit is that we can add
assertions about register files and generations.

I've chosen not to convert brw_reg::type to the enum, since converting
it caused a lot of trouble due to C++ enum rules (even though it's
defined in an extern "C" block...).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
i965: Add BRW_REGISTER_TYPE_DF.

Ivybridge, Baytrail, and Haswell support double float register types,
but do not support them as immediate values.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
i965: Add support for Broadwell's new register types.

Broadwell introduces support for Q, UQ, and HF types.  It also extends
DF support to allow immediate values.

Irritatingly, although HF and DF both support immediates, they're
represented by a different value depending on the register file.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
i965: Store QPitch in intel_mipmap_tree.

Broadwell allows us to specify an arbitrary value for QPitch, rather
than baking a specific formula into the hardware and requiring software
to lay things out to match.  The only restriction is that the software
provided QPitch needs to be large enough so successive array slices do
not overlap.

In order to support this flexibility, software needs to specify QPitch
in a bunch of packets.  Storing QPitch makes that easy, and allows us to
adjust it in a single place should we wish to change it in the future.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
i965/gen6: Fix HiZ hang in WebGL Google Maps

Emitting flushes before depth and hiz resolves at the top of blorp's
state emission fixes the hang. Marchesin and I found the fix
experimentally, as opposed to adhering to a documented hardware
workaround.  A more minimal fix likely exists, but this gets the job
done.

Fixes HiZ hangs in the new WebGL Google maps on Sandybridge Chrome OS.
Tested by zooming in and out continuously for 2 hours.

This patch is based on
https://chromium.googlesource.com/chromiumos/overlays/chromiumos-overlay/+/8bc07bb70163c3706fb4ba5f980e57dc942f56dd

CC: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70740
Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Use RED for depth texture formats rather than INTENSITY.

While looking through the documentation, I found this in the Sandybridge
PRM (Volume 4, Part 1, Page 140):
"Use of sample_c with SURFTYPE_CUBE surfaces is undefined with the
 following surface formats: I24X8_UNORM, L24X8_UNORM, A24X8_UNORM,
 I32_FLOAT, L32_FLOAT, A32_FLOAT."

I haven't observed this to be true, but it suggests that we may want to
use other formats.

We already perform DEPTH_TEXTURE_MODE swizzling in the shaders, and
don't rely on the surface format to splat things appropriately.  So
using RED should work just as well as INTENSITY.

A few notes about the formats:
- R24_UNORM_X8_TYPELESS has the exact same properties as I24X8_UNORM.
- R16_UNORM and R32_FLOAT are additionally supported as a render target,
  while the old I16_UNORM/I32_FLOAT formats are not.
- R32_FLOAT_X8X24_TYPELESS is not supported as a render target, while
  the old format (R32G32_FLOAT) was.  However, it shares the same
  properties as the formats we use for Z24, so it should suffice.

This makes translate_tex_format and brw_blorp_surface_info::set
a bit more similar.

No Piglit changes on Sandybridge or Ivybridge.  No oglconform changes on
Sandybridge.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
dri3: Switch to libxshmfence version 1.1

libxshmfence v1.0 foolishly used 'int32_t *' for the fence type, which
works when the fence is a linux futex. However, version 1.1
changes the exported datatype to 'struct xshmfence *'

Require libxshmfence version 1.1 and switch the API around.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
dri3: Free resources when drawable is destroyed.

Always nice to clean up after ourselves.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
dri3: Clean up struct dri3_drawable

Move the depth field up with width and height.

Remove unused previous_time and frames fields.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Correct check for re-bound buffer in intel_update_image_buffer

The buffer-object is the persistent thing passed through the loader, so when
updating an image buffer, check to see if it is already bound to the provided
bo. The region, on the other hand, is allocated separately for the miptree,
and so will never be the same as that passed back from the loader.

Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>