Update Creotech PCB pinout
Update Creotech PCB pinout pt.2
Fix multiple descriptors bug due to wrong DW ordering
Fix DDR SDRAM word alignment issues
Add Wishbone endpoint support: 64 bit data width, no granularity, 29 bit address width. Also, fix some SDRAM data issues.
Update modelsim waveform set
Update .gitignore
Update xise project file