MIPS: JZ4770: Added base addresses for AHB1 devices
MIPS: JZ4770: Add clock definitions for AUX and VPU
MIPS: JZ4770: Add IRQ handling for VPU interrupts
MIPS: JZ4770: Add OPCR bits to control AHB1 power
MIPS: JZ4770: Disable AHB1 power at startup

Enable it only enable when device uses it.
MIPS: JZ4770: Log all main clock freqs at boot
misc: Add driver for JZ4770 VPU

This is a squashed version of development done in the jz-3.11-vpu
branch.

The driver is based on Ingenic's VPU driver, with many fixes and
cleanups from Wladimir J. van der Laan and Maarten ter Huurne.
MIPS: JZ4770: Add platform device for VPU
MIPS: JZ4770: GCW0: Add VPU device
MIPS: JZ4770: GCW0: defconfig: Enable VPU driver
MIPS: JZ4770: Add define of MPORT register in DDRC